• Title/Summary/Keyword: linearly-graded junction

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A study on I-V characteristics in JBS rectifiers according to PN junction structures (JBS(Junction Barrier-controlled Schottky)정류기의 PN접합구조에 따른 I-V 특성에 관한 연구)

  • 안병목;정원채
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.1
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    • pp.13-20
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    • 2000
  • In this paper, we demonstrated an analytical description method of forward votage drop and reverse leakage current of the junction barrier controlled schottky rectifier with linearly graded junction and abrupt junction models. In this case, the vertical depths of device are 1[${\mu}{\textrm}{m}$] and 2[${\mu}{\textrm}{m}$], respectively. Through ion implantation and annealing process, we obtain the data of lateral and depth from implanted 2-dimensional profiles. Also we applied these data to models that indicate the change of depletion each on linearly-graded and abrupt juction as the forward and revers bias. After applied depletion changes to electric characteristics of JBS rectifiers, we calculated the forward I-V, the reverse leakage current and temperatures vs. power dissipations according to each junction. When we compared the rectifier with calculated and measured data, from the calculated results, forward votage drop with linearly graded junction is lower than that of abrupt junction and reverse leakage current with linearly graded junction is lower(≒1$\times$10\ulcorner times) than that of abrupt junction. Also, the power dissipations according to different juction depth(1[${\mu}{\textrm}{m}$], 2[${\mu}{\textrm}{m}$]) of device are calculated. Seeing the calculated results, we confirmed it from analytic model that the rectifier with linearly graded junction retained a low power dissipation up to 600[$^{\circ}C$] in comparison with the rectifier with abrupt junction.

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Electrical Characteristics of AIGaAs/GaAs HBTs with different Emitter/Base junction structures (접합구조에 따른 AIGaAs/GaAs HBT의 전기적 특성에 관한 연구)

  • 김광식;안형근;한득영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.07a
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    • pp.63-66
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    • 2000
  • In this paper, we present the simulation of the heterojunction bipolar transistor with different Emitter-Base junction structures. Our simulation results include effect of setback and graded layer. We prove the emitter efficiency's improvement through setback and graded layer. In 1995, the analytical equations of electric field, electrostatic potential, and junction capacitance for abrupt and linearly graded heterojunctions with or without a setback layer was derived. But setback layer and linearly graded layer's recombination current was considered numerically. Later, recombination current model included setback layer and graded layer will be proposed. New recombination current model also wile include abrupt heterojunction's recombination current model. In this paper, the material parameters of the heterojunction bipolar transistor with different Emitter-Base junction structures is introduced.

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DC Characteristics of AIGaAs/GaAs HBTs with different Emitter/Base junction structures (접합구조에 따른 AIGaAs/GaAs HBT의 DC 특성에 관한 연구)

  • 김광식;유영한;안형근;한득영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.07a
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    • pp.67-70
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    • 2000
  • In this paper, all SCR recombination currents including setback and graded layer's recombination currents are analytically introduced for the first time. Different emitter-base structures are tested to prove the validity of the model. In 1995, the analytical equations of electric field, electrostatic potential, and junction capacitance for abrupt and linearly graded heterojunctions with or without a setback layer was derived. But setback layer and linearly graded layer's recombination current was considered numerically. In this paper, recombination current model included setback layer and graded layer is proposed. New recombination current model also includes abrupt heterojunction's recombination current model. In this paper, new recombination current model analytically explains effects of setback layer and graded layer.

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A Study on Optimal Design of 100 V Class Super-junction Trench MOSFET (비균일 100V 급 초접합 트랜치 MOSFET 최적화 설계 연구)

  • Lho, Young Hwan
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.7
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    • pp.109-114
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    • 2013
  • Power MOSFET (metal-oxide semiconductor field-effect transistor) are widely used in power electronics applications, such as BLDC (Brushless Direct Current) motor and power module, etc. For the conventional power MOSFET device structure, there exists a tradeoff relationship between specific on-state resistance and breakdown voltage. In order to overcome the tradeoff relationship, a non-uniform super-junction (SJ) trench MOSFET (TMOSFET) structure for an optimal design is proposed in this paper. It is required that the specific on-resistance of non-uniform SJ TMOSFET is less than that of uniform SJ TMOSFET under the same breakdown voltage. The idea with a linearly graded doping profile is proposed to achieve a much better electric field distribution in the drift region. The structure modelling of a unit cell, the characteristic analyses for doping density, and potential distribution are simulated by using of the SILVACO TCAD 2D device simulator, Atlas. As a result, the non-uniform SJ TMOSFET shows the better performance than the uniform SJ TMOSFET in the specific on-resistance at the class of 100V.

Fabrication of a Large-Area $Hg_{1-x}Cd_{x}$Te Photovoltaic Infrared Detector ($Hg_{1-x}Cd_{x}$Te photovoltaic 대형 적외선 감지 소자의 제작)

  • Chung, Han;Kim, Kwan;Lee, Hee-Chul;Kim, Jae-Mook
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.2
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    • pp.88-93
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    • 1994
  • We fabricated a large-scale photovoltaic device for detecting-3-5$\mu$m IR, by forming of n$^{+}$-p junction in the $Hg_{1-x}Cd_{x}$Te (MCT) layer which was grown by LPE on CdTe substrate. The composition x of the MCT epitaxial layer was 0.295 and the hole concentration was 1.3${\times}10^{13}/cm^{4}$. The n$^{+}$-p junction was formed by B+ implantation at 100 keV with a does 3${\times}10^{11}/cm^{2}. The n$^{+}$ region has a circular shape with 2.68mm diameter. The vacuum-evaporated ZnS with resistivity of 2${\times}10^{4}{\Omega}$cm is used as an insulating layer over the epitaxial layer. ZnS plays the role of the anti-reflection coating transmitting more than 90% of 3~5$\mu$m IR. For ohmic contacts, gole was used for p-MCT and indium was used for n$^{+}$-MCT. The fabrication took 5 photolithographic masks and all the processing temperatures of the MCT wafer were below 90$^{\circ}C$. The R,A of the fabricated devices was 7500${\Omega}cm^{2}$. The carrier lifetime of the devices was estimated 2.5ns. The junction was linearly-graded and the concentration slope was measured to be 1.7${\times}10^{17}/{\mu}m$. the normalized detectivity in 3~5$\mu$m IR was 1${\times}10^{11}cmHz^{12}$/W, which is sufficient for real application.

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