• Title/Summary/Keyword: line edge roughness (LER)

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Monte Carlo Simulation Study: the effects of double-patterning versus single-patterning on the line-edge-roughness (LER) in FDSOI Tri-gate MOSFETs

  • Park, In Jun;Shin, Changhwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.5
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    • pp.511-515
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    • 2013
  • A Monte Carlo (MC) simulation study has been done in order to investigate the effects of line-edge-roughness (LER) induced by either 1P1E (single-patterning and single-etching) or 2P2E (double-patterning and double-etching) on fully-depleted silicon-on-insulator (FDSOI) tri-gate metal-oxide-semiconductor field-effect transistors (MOSFETs). Three parameters for characterizing the LER profile [i.e., root-mean square deviation (${\sigma}$), correlation length (${\zeta}$), and fractal dimension (D)] are extracted from the image-processed scanning electron microscopy (SEM) image for each photolithography method. It is experimentally verified that two parameters (i.e., ${\sigma}$ and D) are almost the same in each case, but the correlation length in the 2P2E case is longer than that in the 1P1E case. The 2P2E-LER-induced $V_TH$ variation in FDSOI tri-gate MOSFETs is smaller than the 1P1E-LER-induced $V_TH$ variation. The total random variation in $V_TH$, however, is very dependent on the other major random variation sources, such as random dopant fluctuation (RDF) and work-function variation (WFV).

Modeling and Simulation of Line Edge Roughness for EUV Resists

  • Kim, Sang-Kon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.1
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    • pp.61-69
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    • 2014
  • With the extreme ultraviolet (EUV) lithography, the performance limit of chemically amplified resists has recently been extended to 16- and 11-nm nodes. However, the line edge roughness (LER) and the line width roughness (LWR) are not reduced automatically with this performance extension. In this paper, to investigate the impacts of the EUVL mask and the EUVL exposure process on LER, EUVL is modeled using multilayer-thin-film theory for the mask structure and the Monte Carlo (MC) method for the exposure process. Simulation results demonstrate how LERs of the mask transfer to the resist and the exposure process develops the resist LERs.

Role of CH2F2 and N-2 Flow Rates on the Etch Characteristics of Dielectric Hard-mask Layer to Extreme Ultra-violet Resist Pattern in CH2F2/N2/Ar Capacitively Coupled Plasmas

  • Kwon, B.S.;Lee, J.H.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.210-210
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    • 2011
  • The effects of CH2F2 and N2 gas flow rates on the etch selectivity of silicon nitride (Si3N4) layers to extreme ultra-violet (EUV) resist and the variation of the line edge roughness (LER) of the EUV resist and Si3N4 pattern were investigated during etching of a Si3N4/EUV resist structure in dual-frequency superimposed CH2F2/N2/Ar capacitive coupled plasmas (DFS-CCP). The flow rates of CH2F2 and N2 gases played a critical role in determining the process window for ultra-high etch selectivity of Si3N4/EUV resist due to disproportionate changes in the degree of polymerization on the Si3N4 and EUV resist surfaces. Increasing the CH2F2 flow rate resulted in a smaller steady state CHxFy thickness on the Si3N4 and, in turn, enhanced the Si3N4 etch rate due to enhanced SiF4 formation, while a CHxFy layer was deposited on the EUV resist surface protecting the resist under certain N2 flow conditions. The LER values of the etched resist tended to increase at higher CH2F2 flow rates compared to the lower CH2F2 flow rates that resulted from the increased degree of polymerization.

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Role of $N_2$ flow rate on etch characteristics and variation of line edge roughness during etching of silicon nitride with extreme ultra-violet resist pattern in dual-frequency $CH_2F_2/N_2$/Ar capacitively coupled plasmas

  • Gwon, Bong-Su;Jeong, Chang-Ryong;Lee, Nae-Eung;Lee, Seong-Gwon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.458-458
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    • 2010
  • The process window for the etch selectivity of silicon nitride ($Si_3N_4$) layers to extreme ultra-violet (EUV) resist and variation of line edge roughness (LER) of EUV resist were investigated durin getching of $Si_3N_4$/EUV resist structure in a dual-frequency superimposed capacitive coupled plasma (DFS-CCP) etcher by varying the process parameters, such as the $CH_2F_2$ and $N_2$ gas flow rate in $CH_2F_2/N_2$/Ar plasma. The $CH_2F_2$ and $N_2$ flow rate was found to play a critical role in determining the process window for infinite etch selectivity of $Si_3N_4$/EUV resist, due to disproportionate changes in the degree of polymerization on $Si_3N_4$ and EUV resist surfaces. The preferential chemical reaction between hydrogen and carbon in the hydrofluorocarbon ($CH_xF_y$) polymer layer and the nitrogen and oxygen on the $Si_3N_4$, presumably leading to the formation of HCN, CO, and $CO_2$ etch by-products, results in a smaller steady-state hydrofluorocarbon thickness on $Si_3N_4$ and, in turn, in continuous $Si_3N_4$ etching due to enhanced $SiF_4$ formation, while the $CH_xF_y$ layer is deposited on the EUV resist surface. Also critical dimension (and line edge roughness) tend to decrease with increasing $N_2$ flow rate due to decreased degree of polymerization.

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Analysis of Random Variations and Variation-Robust Advanced Device Structures

  • Nam, Hyohyun;Lee, Gyo Sub;Lee, Hyunjae;Park, In Jun;Shin, Changhwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.1
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    • pp.8-22
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    • 2014
  • In the past few decades, CMOS logic technologies and devices have been successfully developed with the steady miniaturization of the feature size. At the sub-30-nm CMOS technology nodes, one of the main hurdles for continuously and successfully scaling down CMOS devices is the parametric failure caused by random variations such as line edge roughness (LER), random dopant fluctuation (RDF), and work-function variation (WFV). The characteristics of each random variation source and its effect on advanced device structures such as multigate and ultra-thin-body devices (vs. conventional planar bulk MOSFET) are discussed in detail. Further, suggested are suppression methods for the LER-, RDF-, and WFV-induced threshold voltage (VTH) variations in advanced CMOS logic technologies including the double-patterning and double-etching (2P2E) technique and in advanced device structures including the fully depleted silicon-on-insulator (FD-SOI) MOSFET and FinFET/tri-gate MOSFET at the sub-30-nm nodes. The segmented-channel MOSFET (SegFET) and junctionless transistor (JLT) that can suppress the random variations and the SegFET-/JLT-based static random access memory (SRAM) cell that enhance the read and write margins at a time, though generally with a trade-off between the read and the write margins, are introduced.

Inductively coupled plasma etching of SnO2 as a new absorber material for EUVL binary mask

  • Lee, Su-Jin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.124-124
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    • 2010
  • Currently, extreme ultraviolet lithography (EUVL) is being investigated for next generation lithography. EUVL is one of competitive lithographic technologies for sub-22nm fabrication of nano-scale Si devices that can possibly replace the conventional photolithography used to make today's microcircuits. Among the core EUVL technologies, mask fabrication is of considerable importance due to the use of new reflective optics having a completely different configuration compared to those of conventional photolithography. Therefore, new materials and new mask fabrication process are required for high performance EUVL mask fabrication. This study investigated the etching properties of SnO2 (Tin Oxide) as a new absorber material for EUVL binary mask. The EUVL mask structure used for etching is SnO2 (absorber layer) / Ru (capping / etch stop layer) / Mo-Si multilayer (reflective layer) / Si (substrate). Since the Ru etch stop layer should not be etched, infinitely high selectivity of SnO2 layer to Ru ESL is required. To obtain infinitely high etch selectivity and very low LER (line edge roughness) values, etch parameters of gas flow ratio, top electrode power, dc self - bias voltage (Vdc), and etch time were varied in inductively coupled Cl2/Ar plasmas. For certain process window, infinitely high etch selectivity of SnO2 to Ru ESL could be obtained by optimizing the process parameters. Etch characteristics were measured by on scanning electron microscopy (SEM) and X-ray photoelectron spectroscopy (XPS) analyses. Detailed mechanisms for ultra-high etch selectivity will be discussed.

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Infinitely high selectivity etching of SnO2 binary mask in the new absorber material for EUVL using inductively coupled plasma

  • Lee, S.J.;Jung, C.Y.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.285-285
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    • 2011
  • EUVL (Extreme Ultra Violet Lithography) is one of competitive lithographic technologies for sub-30nm fabrication of nano-scale Si devices that can possibly replace the conventional photolithography used to make today's microcircuits. Among the core EUVL technologies, mask fabrication is of considerable importance since the use of new reflective optics having a completely different configuration compared to those of conventional photolithography. Therefore new materials and new mask fabrication process are required for high performance EUVL mask fabrication. This study investigated the etching properties of SnO2 (Tin Oxide) as a new absorber material for EUVL binary mask. The EUVL mask structure used for etching is SnO2 (absorber layer) / Ru (capping / etch stop layer) / Mo-Si multilayer (reflective layer) / Si (substrate). Since the Ru etch stop layer should not be etched, infinitely high selectivity of SnO2 layer to Ru ESL is required. To obtain infinitely high etch selectivity and very low LER (line edge roughness) values, etch parameters of gas flow ratio, top electrode power, dc self - bias voltage (Vdc), and etch time were varied in inductively coupled Cl2/Ar plasmas. For certain process window, infinitely high etch selectivity of SnO2 to Ru ESL could be obtained by optimizing the process parameters. Etch characteristics were measured by on scanning electron microscopy (SEM) and X-ray photoelectron spectroscopy (XPS) analyses. Detailed mechanisms for ultra-high etch selectivity will be discussed.

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Performance and Variation-Immunity Benefits of Segmented-Channel MOSFETs (SegFETs) Using HfO2 or SiO2 Trench Isolation

  • Nam, Hyohyun;Park, Seulki;Shin, Changhwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.427-435
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    • 2014
  • Segmented-channel MOSFETs (SegFETs) can achieve both good performance and variation robustness through the use of $HfO_2$ (a high-k material) to create the shallow trench isolation (STI) region and the very shallow trench isolation (VSTI) region in them. SegFETs with both an HTI region and a VSTI region (i.e., the STI region is filled with $HfO_2$, and the VSTI region is filled with $SiO_2$) can meet the device specifications for high-performance (HP) applications, whereas SegFETs with both an STI region and a VHTI region (i.e., the VSTI region is filled with $HfO_2$, and the STI region is filled with $SiO_2$) are best suited to low-standby power applications. AC analysis shows that the total capacitance of the gate ($C_{gg}$) is strongly affected by the materials in the STI and VSTI regions because of the fringing electric-field effect. This implies that the highest $C_{gg}$ value can be obtained in an HTI/VHTI SegFET. Lastly, the three-dimensional TCAD simulation results with three different random variation sources [e.g., line-edge roughness (LER), random dopant fluctuation (RDF), and work-function variation (WFV)] show that there is no significant dependence on the materials used in the STI or VSTI regions, because of the predominance of the WFV.