• Title/Summary/Keyword: layout algorithm

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Analysis and Optimization of a 2-Class-based Dedicated Storage System (2지역/지정위치 저장시스템의 분석과 최적화)

  • Yang, Moonhee
    • Journal of Korean Institute of Industrial Engineers
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    • v.29 no.3
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    • pp.222-229
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    • 2003
  • In this paper, we address a layout design problem, PTN[2], for determining an appropriate 2-class-based dedicated storage layout in a class of unit load storage systems. Our strong conjecture is that PTNI2] is NP-hard. Restricting PTN[2], we provide three solvable cases of PTN[2] in which an optimal solution to the solvable cases is one of the partitions based on the PAI(product activity index)-nonincreasing ordering. However, we show with a counterexample that a solution based on the PAI-non increasing ordering does not always give an optimal solution to PTN[2]. Utilizing the derived properties, we construct an effective heuristic algorithm for solving PTN[2] based on a PAI-non increasing ordering with performance ratio bound. Our algorithm with O($n^2$) is effective in the sense that it guarantees a better class-based storage layout than a randomized storage layout in terms of the expected single command travel time.

Development of an Optimal Sewer Layout Model to Reduce Peak Outflows in Sewer Networks (우수관망의 첨두유출량 감소를 위한 최적설계모형의 개발)

  • Lee, Jung-Ho;Park, Cheong-Hoon;Chang, Dong-Eil;Jun, Hwan-Don;Kim, Joong-Hoon
    • Proceedings of the Korea Water Resources Association Conference
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    • 2008.05a
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    • pp.485-489
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    • 2008
  • To achieve the optimal sewer layout design, most developed models are designed to determine pipe diameter, slope and overall layout in order to minimize the least cost for the design rainfall. However, these models are not capable of considering the superposition effect of runoff hydrographs entering each junction. The suggested Optimal Sewer Layout Model (OSLM) is designed to control flows and distribute the node inflows while taking into consideration the superposition effect for reducing the inundation risk from the sewer pipes. The suggested model used the genetic algorithm to determine the optimal layout, which was connected to the SWMM (Storm Water Management Model) for the calculation of the hydraulic analysis. The suggested model was applied to an urban watershed of 35 ha, which is located in Seoul, Korea. By using the suggested model, several rainfall events, including the design rainfall and excessive rainfalls, were used to generate runoff hydrographs from a modified sewer layout. By the results, the peak outflows at the outlet were decreased and the overflows were also reduced.

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Development of a Factory Layout Design System using Leisure-Boat Building Process (레저보트 생산공정정보 기반의 공장 레이아웃 설계 시스템 개발)

  • Lee, Dong-Kun;Jeong, Yong-Kuk;Shin, Jong-Gye
    • Journal of the Society of Naval Architects of Korea
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    • v.50 no.1
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    • pp.14-24
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    • 2013
  • The marine leisure industry in Korea has been the focus of the power of economic growth and the creation of jobs in recent years. In this regard, many studies concerning marine leisure are on-going in various fields. In this paper, developed a layout system and algorithm can resolve the factory and facility layout problem. For a layout design of leisure-boat factories, the leisure-boat production process is analyzed in order to derive standard production space elements for the layout of the factory. Based on the results, a draft design of the factory layout is carried out based on the manpower planning data, as well as the characteristics and relationships of each process data. A layout design of this paper can be verified through a factory simulation solution and we suggest the verification method using a SBD(simulation based design) methodology. The layout system takes into account the user's accessibility and extendibility, so it is web-oriented and uses RIA (rich Internet Application) technology. Furthermore, the system and layout algorithm of this paper are verified with samples data that show the efficient factory arrangement and practical application method.

Layout of Garment Patterns for Efficient Fabric Consumption

  • Madarasmi, Suthep;Sirivarothakul, Phoomsith
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.1176-1179
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    • 2002
  • This paper presents the use of a Genetic Algorithm to find the optimal layout for the placement of garment patterns on a fabric of fixed width to minimize fabric waste. We developed a program to simulate garment pieces and their layout on a fixed-width fabric. Each piece in the order book is placed with 2 possible orientations: 0 degrees and 180 degrees. The efficiency is measured by the length of fabric used after all the patterns in the order book have been laid out. A comparison is made between the placement using our proposed genetic algorithm to that made by an expert human using our simulation program. The results from our experiments on various pattern designs indicate that our genetic algorithm can effectively be used to obtain highly efficient solutions, comparable to that done by an expert while using a reasonable amount of time. The algorithm can also be adapted for use in other areas related to optimal consumption of sheet material such as metal, paper, and leather.

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Facility Layout Planning Using Ant Algorithm (개미 알고리듬을 이용한 설비배치계획)

  • Lee Seong Yeol;Lee Wol Seon
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2003.05a
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    • pp.1065-1070
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    • 2003
  • Facility Layout Planning is concerned with how to arrange facilities necessary for production in a given space. Its objective is often to minimize the total sum of all material flows multiplied by the distance among facilities. FLP belongs to NP complete problem; i.e., the number of possible layout solutions increases with the increase of the number of facilities. Thus, meta heuristics such as Genetic Algorithm (GA) and Simulated Annealing have been investigated to solve the FLP problems. However, one of the biggest problems which lie in the existing meta heuristics including GA is hard to find an appropriate combinations of parameters which result in optimal solutions for the specific problem. The Ant System algorithm with elitist and ranking strategies is used to solve the FLP problem as an another good alternative. Experimental results show that the AS algorithm is able to produce the same level of solution quality with less sensitive parameters selection comparing to the ones obtained by applying other existing meta heuristic algorithms.

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A New Algorithm for Drawing the Shuffle-Exchange Graph (혼합-교환도 작성을 위한 새 알고리즘)

  • Lee, Sung Woo;Hwang, Ho Jung
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.2
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    • pp.217-224
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    • 1986
  • In case of VLSI design, the shuffle-exchange graph is useful for optimal layout. HOEY and LEISERSON proposed the method of drawing a N-nodes shuffle-exchange graph on O(N2/log N) layout area by using the complex plane digram. [2] In this paper, a new algorithm for drawing the shuffle-exchange graph is proposed. This algorithm is not by using the complex plane diabram, but the table of e decimal represented nodes of shuffle-edge relations. And the structural properties for optimal layout of the graph are summarized and verified. By using this more simplified algorithm, a FORTRAN program which can be treated faster is written. Aimed near optimal shuffle-exchange graphs are printed out by giving inputs` the number of nodes.

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Simulated Annealing for Reduction of Defect Sensitive Area Through Via Moving (Via 이동을 통한 결함 민감 지역 감소를 위한 시뮬레이티드 어닐링)

  • Lee, Seung Hwan;Sohn, So Young
    • Journal of Korean Institute of Industrial Engineers
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    • v.28 no.1
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    • pp.57-62
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    • 2002
  • The semiconductor industry has continuously been looking for the ways to improve yield and to reduce manufacturing cost. The layout modification approach, one of yield enhancement techniques, is applicable to all design styles, but it does not require any additional resources in terms of silicon area. The layout modification method for yield enhancement consists of making local variations in the layout of some layers in such a way that the critical area, and consequently the sensitivity of the layer to point defects, is reduced. Chen and Koren (1995) proposed a greedy algorithm that removes defect sensitive area using via moving, but it is easy to fall into a local minimum. In this paper, we present a via moving algorithm using simulated annealing and enhance yield by diminishing defect sensitive area. As a result, we could decrease the defect sensitive area effectively compared to the greedy algorithm presented by Chen and Koren. We expect that the proposed algorithm can make significant contributions on company profit through yield enhancement.

Line Tracking Algorithm for Table Structure Analysis in Form Document Image (양식 문서 영상에서 도표 구조 분석을 위한 라인 추적 알고리즘)

  • Kim, Kye-Kyung
    • Journal of Software Assessment and Valuation
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    • v.17 no.2
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    • pp.151-159
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    • 2021
  • To derive grid lines for analyzing a table layout, line image enhancement techniques are studying such as various filtering or morphology methods. In spite of line image enhancement, it is still hard to extract line components and to express table cell's layout logically in which the cutting points are exist on the line or the tables are skewing . In this paper, we proposed a line tracking algorithm to extract line components under the cutting points on the line or the skewing lines. The table document layout analysis algorithm is prepared by searching grid-lines, line crossing points and gird-cell using line tracking algorithm. Simulation results show that the proposed method derive 96.4% table document analysis result with average 0.41sec processing times.

A Study of Adapted Genetic Algorithm for Circuit Partitioning (회로 분할을 위한 어댑티드 유전자 알고리즘 연구)

  • Song, Ho-Jeong;Kim, Hyun-Gi
    • The Journal of the Korea Contents Association
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    • v.21 no.7
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    • pp.164-170
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    • 2021
  • In VLSI design, partitioning is a task of clustering objects into groups so that a given objective circuit is optimized. It is used at the layout level to find strongly connected components that can be placed together in order to minimize the layout area and propagation delay. The most popular algorithms for partitioning include the Kernighan-Lin algorithm, Fiduccia-Mattheyses heuristic and simulated annealing. In this paper, we propose a adapted genetic algorithm searching solution space for the circuit partitioning problem, and then compare it with simulated annealing and genetic algorithm by analyzing the results of implementation. As a result, it was found that an adaptive genetic algorithm approaches the optimal solution more effectively than the simulated annealing and genetic algorithm.

Netlist Partitioning Genetic Algorithm for 4-Layer Channel Routing (4-레이어 채널 배선을 위한 네트리스트 분할 유전자 알고리즘)

  • 송호정;송기용
    • Journal of the Institute of Convergence Signal Processing
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    • v.4 no.1
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    • pp.64-70
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    • 2003
  • Current growth of VLSI design depends critically on the research and development (If automatic layout tool. Automatic layout is composed of placement assigning a specific shape to a block and arranging the block on the layout surface and routing finding the interconnection of all the nets. Algorithms Performing placement and routing impact on Performance and area of VLSI design. Channel routing is a problem assigning each net to a track after global routing and minimizing the track that assigned each net. In this paper we propose a genetic algorithm searching solution space for the netlist partitioning problem for 4-layer channel routing. We compare the performance of proposed genetic algorithm(GA) for channel routing with that of simulated annealing(SA) algorithm by analyzing the results which are the solution of given problems. Consequently experimental results show that out proposed algorithm reduce area over the SA algorithm.

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