• Title/Summary/Keyword: lateral bipolar transistor

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Simulation of a Novel Lateral Trench Electrode IGBT with Improved Latch-up and Forward Blocking Characteristics

  • Kang, Ey-Goo;Moon, Seung-Hyun;Kim, Sangsig;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
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    • v.2 no.1
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    • pp.32-38
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    • 2001
  • A new small sized Lateral Trench electrode Insulated Gate Bipolar Transistor(LTEIGBT) was proposed to improve the characteristics of conventional Lateral IGBT (LIGBT) and Lateral Trench gate IGBT (LTIGBT). The entire electrode of LTEIGBT was replace with trench-type electrode. The LTEIGBT was designed so that the width of device was no more than 19 ㎛. The Latch-up current densities of LIGBT, LTIGBT and the proposed LTEIGBT were 120A/㎠, 540A/㎠, and 1230A/㎠, respectively. The enhanced latch-up capability of the LTEIGBT was obtained through holes in the current directly reaching the cathode via the p+ cathode layer underneath n+ cathode layer. The forward blocking voltage of the LTEIGBT is 130V. Conventional LIGBT and LTIGBT of the same size were no more than 60V and 100V, respectively. Because the the proposed device was constructed of trench-type electrodes, the electric field moved toward trench-oxide layer, and punch through breakdown of LTEIGBT is occurred, lately.

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A Study on the Forward I-V Characteristics of the Separated Shorted-Anode Lateral Insulated Gate Bipolar Transistor (분리된 단락 애노드를 이용한 수평형 SA-LIGBT 의 순방향 전류-전압 특성 연구)

  • Byeon, Dae-Seok;Chun, Jeong-Hun;Lee, Byeong-Hun;Kim, Du-Yeong;Han, Min-Ku;Choi, Yeon-Ik
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.48 no.3
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    • pp.161-166
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    • 1999
  • We investigate the device characteristics of the separated shorted-anode LIGBT (SSA-LIGBT), which suppresses effectively the negative differential resistance regime, by 2-dimensional numerical simulation. The SSA-LIGBT increases the pinch resistance by employing the highly resistive n-drift region as an electron conduction path instead of the lowly resistive n buffer region of the conventional SA-LIGBT. The negative differential resistance regime of the SSA-LIGBT is significantly suppressed as compared with that of the conventional SA-LIGBT. The SSA-LIGBT shows the lower forward voltage drop than that of the conventional SA-LIGBT.

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Study on New LIGBT with Multi Gate for High Speed and Improving Latch up Effect (래치 업 특성의 개선과 고속 스위칭 특성을 위한 다중 게이트 구조의 새로운 LIGBT)

  • 강이구;성만영
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.5
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    • pp.371-375
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    • 2000
  • In this paper a new conductivity modulated power transistor called the Lateral Insulated Gated Bipolar Transistor which included n+ ring and p-channel gate is presented. A new lateral IGBT structure is proposed to suppress latch-up and to improve turn off time by imploying n+ ring and p-channel gate and verified by MEDICI. The simulated I-V characteristics at $V_{G}$=15V show that the latch up occurs at $V_{A}$=18V and 6.9$\times$10$^{-5}$ A/${\mu}{\textrm}{m}$ for the proposed LIGBT while the conventional LIGBT latches at $V_{A}$=1.3V and 1.96${\mu}{\textrm}{m}$10$^{-5A}$${\mu}{\textrm}{m}$. It is shown that turn off characteristic of new LIGBT is 8 times than that of conventional LIGBT. And noble LIGBT is not n+ buffer layer because that It includes p channel gate and n+ ring. Therefore Mask for the buffer layer isn’t needed. The concentration of n+ ring is and the numbers of n+ ring and p channel gate are three for the optimal design.n.n.n.n.

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Breakdown characteristics of the SOI LIGBT with dual-epi layer (이중 에피층을 가지는 SOI LIGBT의 에피층 두께에 따른 항복전압 특성 분석)

  • Kim, Hyoung-Woo;Kim, Sang-Cheol;Seo, Kil-Soo;Bahng, Wook;Kim, Nam-Kyun;Kim, Eun-Dong
    • Proceedings of the KIEE Conference
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    • 2004.07c
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    • pp.1585-1587
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    • 2004
  • 이중 에피층 구조를 가지는 SOI(Silicon-On-Insulator) LIGBT(Lateral Insulated Gate Bipolar Transistor)의 에피층 두께 변화에 따른 항복전압 특성을 분석하였다. 제안된 소자는 전하보상효과를 얻기 위해 n/p-epi의 이중 에피층 구조를 사용하였으며, 에피층 전체에 걸쳐서 전류가 흐를 수 있도록 하기 위해 trenched anode구조를 채택하였다. 본 논문에서는 n/p-epi층의 농도를 고정시킨 후 각각의 epi층의 두께를 변화시켜가며 simulation을 수행하였을 때 항복전압의 변화 및 표면과 epi층에서의 전계분포변화를 분석하였다.

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The Analysis of Electrothermal Conductivity Characteristics for SOI(SOS) LIGBT with latch-up

  • Kim, Je-Yoon;Hong, Seung-Woo;Park, Sang-Won;Sung, Man-Young;Kang, Ey-Goo
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.4
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    • pp.129-132
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    • 2004
  • The electrothermal characteristics of a high voltage LIGBT(Lateral Insulated Gate Bipolar Transistor) using thin silicon on insulator (SOI) and silicon on sapphire (SOS) such as thermal conductivity and sink is analyzed by MEDICI. The device simulations demonstrate that the thermal conductivity of the buried oxide is an important parameter for modeling of the thermal behavior of SOI devices. In this paper we simulated the thermal conductivity and temperature distribution of a SOI LIGBT with an insulator layer of SiO$_2$ and $Al_2$O$_3$ at before and after latch-up and verified that the SOI LIGBT with the $Al_2$O$_3$ insulator had good thermal conductivity and reliability.

A Study on Fabrication of SOI Wafer by Hydrogen Plasma and SOI Power Semiconductor Devices (수소 플라즈마를 이용한 SOI 기판 제작 및 SOI 전력용 반도체 소자 제작에 관한 연구)

  • Sung, Man-Young
    • Proceedings of the KIEE Conference
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    • 2000.11a
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    • pp.250-255
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    • 2000
  • 본 "수소 플라즈마를 이용한 SOI 기판 제작 및 SOI 전력용 반도체 소자 제작에 관한 연구"를 통해 수소플라즈마 전처리 공정에 의한 실리콘 기판 표면의 활성화를 통해 실리콘 직접 접합 공정을 수행하여 접합된 기판쌍을 제작할 수 있었으며, 접합된 기판쌍에 대한 CMP(Chemical Mechanical Polishing) 공정을 통해 SOI(Silicon on Insulator) 기판을 제작할 수 있었다. 아울러, 소자의 동작 시뮬레이션을 통해 기존 SOI LIGBT(Lateral Insulated Gate Bipolar Transistor) 소자에 비해 동작 특성이 향상된 이중 채널 SOI LIGBT 소자의 설계 파라미터를 도출하였으며, 공정 시뮬레이션을 통해 소자 제작 공정 조건을 확립하였고, 마스크 설계 및 소자 제작을 통해 본 연구 수행으로 개발된 SOI 기판의 전력용 반도체 소자 제작에 대한 가능성을 확인할 수 있었다.

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The thermal conductivity analysis of the SOI/SOS LIGBT structure (Latch up 전후의 SOI(SOS) LIGBT 구조에서의 열전도 특성 분석)

  • Kim, Je-Yoon;Kim, Jae-Wook;Sung, Man-Young
    • 한국컴퓨터산업교육학회:학술대회논문집
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    • 2003.11a
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    • pp.79-82
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    • 2003
  • The electrothermal simulation of high voltage LIGBT(Lateral Insulated Gate Bipolar Transistor) in thin Silicon on insulator (SOI) and Silicon on sapphire (SOS) for thermal conductivity and sink is performed by means of MEDICI. The finite element simulations demonstrate that the thermal conductivity of the buried oxide is an important parameter for the modeling of the thermal behavior of silicon-on-insulator (SOI) devices. In this paper, using for SOI LIGBT, we simulated electrothermal for device that insulator layer with $SiO_2$ and $Al_2O_3$ at before and after latch up to measured the thermal conductivity and temperature distribution of whole device and verified that SOI LIGBT with $Al_2O_3$ insulator had good thermal conductivity and reliability.

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Numerical Analyses on Snapback-Free Shorted-Anode SOI LIGBT by using a Floating Electrode and an Auxiliary Gate (플로우팅 전극과 보조 게이트를 이용하여 스냅백을 없앤 애노드 단락 SOI LIGBT의 수치 해석)

  • O, Jae-Geun;Kim, Du-Yeong;Han, Min-Gu;Choe, Yeon-Ik
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.2
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    • pp.73-77
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    • 2000
  • A dual-gate SOI SA-LIGBT (shorted-anode lateral insulated gate bipolar transistor) which eliminates the snapback effectively is proposed and verified by numerical simulation. The elimination of the snapback in I-V characteristics is obtained by initiating the hole injection at low anode voltage by employing a dual gate and a floating electrode in the proposed device. For the proposed device, the snapback phenomenon is completely eliminate, while snapback of conventional SA-LIGBT occurs at anode voltage of 11 V. Also, the drive signals of two gates have same polarity by employing the floating electrode, thereby requiring no additional power supply.

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A New Snap-back Suppressed SA-LIGBT with Gradual Hole Injection (점진적인 홀의 주입을 통해 스냅백을 억제한 새로운 구조의 SA-LIGBT)

  • Jeon, Jeong-Hun;Lee, Byeong-Hun;Byeon, Dae-Seok;Lee, Won-O;Han, Min-Gu;Choe, Yeol-Ik
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.2
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    • pp.113-115
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    • 2000
  • The gradual hole injection LIGBT (GI-LIGBT) which employs the dual gate and the p+ injector, was fabricated for eliminating a negative resistance regime and reducing a forward voltage drop in SA-LIGBT. The elimination of the negative resistance regime is successfully achieved by initiating the hole injection gradually. Furthermore, the experimental results show that the forward voltage drop of GI-LIGBT decreases by lV at the current density of 200 $A/cm^2$, when compared with that of the conventional SA-LIGBT. It is also found that the improvement in the on-state characteristics can be obtained without sacrificing the inherent fast switching characteristics of SA-LIGBT.

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Mixed-Mode Simulation of the Power MOSFET with Current Limiting Capability (전류 제한 능력을 갖는 전력용 MOSFET의 Mixed-Mode 시뮬레이션)

  • Yun, Chong-Man;Choi, Yearn-Ik;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 1994.07b
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    • pp.1451-1453
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    • 1994
  • A monolithic current limiting power MOSFET, which may be easily fabricated by the conventional DMOS process, is proposed. The proposed current limiting MOSFET consists of main power cells, sensing cells, and NPN lateral bipolar transistor so that users can adjust the current limiting levels with only one external resistor. The behaviors of the proposed device are numerically simulated and analyzed by 2-D device simulator MEDICI and mixed-mode simulator CA-AAM(Circuit Analysis Advanced Application Module).

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