• 제목/요약/키워드: junction uniformity

검색결과 23건 처리시간 0.018초

A Materials Approach to Resistive Switching Memory Oxides

  • Hasan, M.;Dong, R.;Lee, D.S.;Seong, D.J.;Choi, H.J.;Pyun, M.B.;Hwang, H.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권1호
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    • pp.66-79
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    • 2008
  • Several oxides have recently been reported to have resistance-switching characteristics for nonvolatile memory (NVM) applications. Both binary and ternary oxides demonstrated great potential as resistive-switching memory elements. However, the switching mechanisms have not yet been clearly understood, and the uniformity and reproducibility of devices have not been sufficient for gigabit-NVM applications. The primary requirements for oxides in memory applications are scalability, fast switching speed, good memory retention, a reasonable resistive window, and constant working voltage. In this paper, we discuss several materials that are resistive-switching elements and also focus on their switching mechanisms. We evaluated non-stoichiometric polycrystalline oxides ($Nb_2O_5$, and $ZrO_x$) and subsequently the resistive switching of $Cu_xO$ and heavily Cu-doped $MoO_x$ film for their compatibility with modem transistor-process cycles. Single-crystalline Nb-doped $SrTiO_3$ (NbSTO) was also investigated, and we found a Pt/single-crystal NbSTO Schottky junction had excellent memory characteristics. Epitaxial NbSTO film was grown on an Si substrate using conducting TiN as a buffer layer to introduce single-crystal NbSTO into the CMOS process and preserve its excellent electrical characteristics.

고효율 TOPCon 태양전지의 SiOX/poly-Si박막 형성 기법과 passivating contact 특성 (Passivating Contact Properties based on SiOX/poly-Si Thin Film Deposition Process for High-efficiency TOPCon Solar Cells)

  • 김성헌;김태용;정성진;차예원;김홍래;박소민;주민규;이준신
    • 신재생에너지
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    • 제18권1호
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    • pp.29-34
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    • 2022
  • The most prevalent cause of solar cell efficiency loss is reduced recombination at the metal electrode and silicon junction. To boost efficiency, a a SiOX/poly-Si passivating interface is being developed. Poly-Si for passivating contact is formed by various deposition methods (sputtering, PECVD, LPCVD, HWCVD) where the ploy-Si characterization depends on the deposition method. The sputtering process forms a dense Si film at a low deposition rate of 2.6 nm/min and develops a low passivation characteristic of 690 mV. The PECVD process offers a deposition rate of 28 nm/min with satisfactory passivation characteristics. The LPCVD process is the slowest with a deposition rate of 1.4 nm/min, and can prevent blistering if deposited at high temperatures. The HWCVD process has the fastest deposition rate at 150 nm/min with excellent passivation characteristics. However, the uniformity of the deposited film decreases as the area increases. Also, the best passivation characteristics are obtained at high doping. Thus, it is necessary to optimize the doping process depending on the deposition method.

Synthesis of Uniformly Doped Ge Nanowires with Carbon Sheath

  • 김태헌;장야무진;최순형;서영민;이종철;황동훈;김대원;최윤정;황성우;황동목
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.289-289
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    • 2013
  • While there are plenty of studies on synthesizing semiconducting germanium nanowires (Ge NWs) by vapor-liquid-solid (VLS) process, it is difficult to inject dopants into them with uniform dopants distribution due to vapor-solid (VS) deposition. In particular, as precursors and dopants such as germane ($GeH_4$), phosphine ($PH_3$) or diborane ($B_2H_6$) incorporate through sidewall of nanowire, it is hard to obtain the structural and electrical uniformity of Ge NWs. Moreover, the drastic tapered structure of Ge NWs is observed when it is synthesized at high temperature over $400^{\circ}C$ because of excessive VS deposition. In 2006, Emanuel Tutuc et al. demonstrated Ge NW pn junction using p-type shell as depleted layer. However, it could not be prevented from undesirable VS deposition and it still kept the tapered structures of Ge NWs as a result. Herein, we adopt $C_2H_2$ gas in order to passivate Ge NWs with carbon sheath, which makes the entire Ge NWs uniform at even higher temperature over $450^{\circ}C$. We can also synthesize non-tapered and uniformly doped Ge NWs, restricting incorporation of excess germanium on the surface. The Ge NWs with carbon sheath are grown via VLS process on a $Si/SiO_2$ substrate coated 2 nm Au film. Thin Au film is thermally evaporated on a $Si/SiO_2$ substrate. The NW is grown flowing $GeH_4$, HCl, $C_2H_2$ and PH3 for n-type, $B_2H_6$ for p-type at a total pressure of 15 Torr and temperatures of $480{\sim}500^{\circ}C$. Scanning electron microscopy (SEM) reveals clear surface of the Ge NWs synthesized at $500^{\circ}C$. Raman spectroscopy peaked at about ~300 $cm^{-1}$ indicates it is comprised of single crystalline germanium in the core of Ge NWs and it is proved to be covered by thin amorphous carbon by two peaks of 1330 $cm^{-1}$ (D-band) and 1590 $cm^{-1}$ (G-band). Furthermore, the electrical performances of Ge NWs doped with boron and phosphorus are measured by field effect transistor (FET) and they shows typical curves of p-type and n-type FET. It is expected to have general potentials for development of logic devices and solar cells using p-type and n-type Ge NWs with carbon sheath.

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