• Title/Summary/Keyword: jitter measurement

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Phase Jitter Analysis of Overlapped Signals for All-to-All TWSTFT Operation

  • Juhyun Lee;Ju-Ik Oh;Joon Hyo Rhee;Gyeong Won Choi;Young Kyu Lee;Jong Koo Lee;Sung-hoon Yang
    • Journal of Positioning, Navigation, and Timing
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    • v.12 no.3
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    • pp.245-255
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    • 2023
  • Time comparison techniques are necessary for generating and keeping Coordinated Universal Time (UTC) and distributing standard time clocks. Global Navigation Satellite System (GNSS) Common View, GNSS All-in-View, Two-Way Satellite Time and Frequency Transfer (TWSTFT), Very Long Baseline Interferometry (VLBI), optical fiber, and Network Time Protocol (NTP) based methods have been used for time comparison. In these methods, GNSS based time comparison techniques are widely used for time synchronization in critical national infrastructures and in common areas of application such as finance, military, and wireless communication. However, GNSS-based time comparison techniques are vulnerable to jamming or interference environments and it is difficult to respond to GNSS signal disconnection according to the international situation. In response, in this paper, Code-Division Multiple Access (CDMA) based All-to-All TWSTFT operation method is proposed. A software-based simulation platform also was designed for performance analysis in multi-TWSTFT signal environments. Furthermore, code and carrier measurement jitters were calculated in multi-signal environments using the designed simulation platform. By using the technique proposed in this paper, it is anticipated that the TWSTFT-based time comparison method will be used in various fields and satisfy high-performance requirements such as those of a GNSS master station and power plant network reference station.

A 32-Gb/s Inductorless Output Buffer Circuit with Adjustable Pre-emphasis in 65-nm CMOS

  • Tanaka, Tomoki;Kishine, Keiji;Tsuchiya, Akira;Inaba, Hiromi;Omoto, Daichi
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.3
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    • pp.207-214
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    • 2016
  • Optical communication systems are rapidly spread following increases in data traffic. In this work, a 32-Gb/s inductorless output buffer circuit with adjustable pre-emphasis is proposed. The proposed circuit consists of an output buffer circuit and an emphasis circuit. The emphasis circuit emphasizes the high frequency components and adds the characteristics of the output buffer circuit. We proposed a design method using a small-signal equivalent-circuit model and designed the compensation characteristics with a 65-nm CMOS process in detail using HSPICE simulation. We also realized adjustable emphasis characteristics by controlling the voltage. To confirm the advantages of the proposed circuit and the design method, we fabricated an output buffer IC with adjustable pre-emphasis. We measured the jitter and eye height with a 32-Gb/s input using the IC. Measurement results of double-emphasis showed that the jitter was 14% lower, and the eye height was 59% larger than single-emphasis, indicating that our proposed configuration can be applied to the design of an output buffer circuit for higher operation speed.

A Study of Acoustic Measurement in Connected Speech with Dysphonia (음성장애 연속구어의 음향학적 분석)

  • Lee, Myoung-Soon
    • Phonetics and Speech Sciences
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    • v.3 no.4
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    • pp.109-115
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    • 2011
  • The purposes of this study were to identify acoustic parameters of connected speech and to contribute to acoustic analysis of dysphonic voice about patient's natural speech voice as well as sustained phonation of vowels. Acoustic parameters of sentences included LTAS (long-term average spectrum) mean and spectral slope over frequence ranges such as 0-4kHz, 0-6kHz, 0-8kHz, 0-12.5kHz as well as HNR. Acoustic parameters of the vowel 'a' included jitter, RAP, shimmer, NHR, and HNR. Based on 'G' of GRBAS for the severity of dysphonia, two experienced raters judged and classified as four groups including controls, mild, moderate and severe dysphonic group. Connected speech was two sentences extracted from 'stroll' passage. Parameters of the vowel and LTAS mean of the sentences were measured by CSL. The spectral slope of the sentences and HNR of the vowel and the sentences were measured by Praat. Data were statistically analyzed by Spearman correlation and Kruskal-Wallis test using SPSS 12.0. The results of this study are as follows: First, jitter, RAP, shimmer and NHR were significantly different between the groups. Second, for several frequencies, LTAS mean and spectral slope of the sentences were significantly different between the groups. Third, the HNR of the sentences were significantly different between the groups. Forth, there was a presence of correlation between HNR and NHR of the vowel and HNR of the sentences. Accordingly, this study concluded that LTAS, spectral slope, and HNR were predictive parameters of connected speech voice for dysphonic voice.

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Giga-bps CMOS Clock and Data Recovery Circuit with a novel Adaptive Phase Detector (새로운 구조의 적응형 위상 검출기를 갖는 Gbps급 CMOS 클럭/데이타 복원 회로)

  • 이재욱;이천오;최우영
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.10C
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    • pp.987-992
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    • 2002
  • In this paper, a new clock and data recovery circuit is proposed for the application of data communication systems requiring ㎓-range clock signals. The circuit is suitable for recovering NRZ data which is widely used for high speed data transmission in ㎓ ranges. The high frequency jitter is one of major performance-limiting factors in PLL, particularly when NRZ data patterns are used. A novel phase detector is able to suppress this noise, and stable clock generation is achieved. Futhermore, the phase detector has an adaptive delay cell removing the dead zone problem and has the optimal characteristics for fast locking. The proposed circuit has a convenience structure that can be easily extended to multi-channels. The circuit is designed based on CMOS 0.25㎛ fabrication process and verified by measurement result.

A 6Gbps 1:2 Demultlplexer Design Using Micro Stacked Spiral inductor in CMOS Technology (Micro Stacked Spiral Inductor를 이용한 6Gbps 1:2 Demultiplexer 설계)

  • Choi, Jung-Myung;Burm, Jin-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.58-64
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    • 2008
  • A 6Gbps 1:2 demultiplexer(DEMUX) IC using $0.18{\mu}m$ CMOS was designed and fabricated. For high speed performance current mode logic(CML) flipflop was used and inductive peaking technology was used so as to obtain higher speed than conventional Current mode logic flipflop. On-chip spiral inductor was designed to maximize the inductive peaking effect using stack structure. Total twelve inductors of $100{\mu}m^2$ area increase was used. The measurement was processed on wafer and 1:2 demultiplexer with and without micro stacked spiral inductors were compared. For 6Gbps data rate measurement, eye width was improved 7.27% and Jitter was improved 43% respectively. Power consumption was 76.8mW and eye height was 180mV at 6 Gbps

Torque and Force Measurement of a Prototype HAU Reaction Wheel and the Effect of Disturbance on the Attitude Stability of Spacecraft

  • Oh, Hwa-Suk;Kwon, Jae-Wook;Lee, Hyunwoo;Nam, Myung-Ryong;Park, Dong-Jo
    • Journal of Mechanical Science and Technology
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    • v.15 no.6
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    • pp.743-751
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    • 2001
  • A Prototype reaction wheel, named the Hankuk Aviation University (HAU) reaction wheel, has been developed for KAISTSAT satellite series. Torque and force disturbances are inherent in reaction wheels, and thus the force and torque characteristics should be examined for every newly developed reaction wheel. The torque and force disturbance noises in the prototype HAU reaction wheel are measured with a torque-measuring table developed for the present study. A new measuring procedure based on a simple principle is applied for the measurements. The frequency characteristics of the torque and force noises are analyzed by examining the power spectral density. The effect of the torque noise on the attitude stability is also examined through numerical simulations with a single-axis attitude model. The noise-induced attitude error and jitter and found to be well below the specified error limits for the KAISTSAT satellite series.

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Study for Correlation between Objective and Subjective Voice Parameters in Patients with Dysphonia (발성장애 환자에서 주관적 음성검사와 객관적 음성검사의 연관성 연구)

  • Park, Jung Woo;Kim, Boram;Oh, Jae Hwan;Kang, Tae Kyu;Kim, Dong Young;Woo, Joo Hyun
    • Journal of the Korean Society of Laryngology, Phoniatrics and Logopedics
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    • v.30 no.2
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    • pp.118-123
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    • 2019
  • Background and Objectives Voice evaluation is classified into subjective tests such as auditory perception and self-measurement, and objective tests such as acoustic and aerodynamic analysis. When evaluating dysphonia, subjective and objective test results do not always match. The purpose of this study was to analyze the relationship between subjective and objective evaluation in patients with dysphonia and to identify meaningful parameters by disease. Materials and Method The total of 322 patients who visited voice clinic from May 2017 to May 2018 were included in this study. Laryngeal lesions were identified using stroboscopy. Pearson correlation test was performed to analyse correlation between subjective tests including GRBAS scale and voice handicap index, and objective tests including jitter, shimmer, noise to harmonic ratio (NHR), cepstral peak prominence (CPP), maximal phonation time (MPT), mean flow rate, and subglottic pressure. Results In vocal nodule and sulcus vocalis, among GRBAS system, grade and breathiness showed good correlation with CPP, and roughness showed good correlation with jitter or shimmer. In unilateral vocal cord paralysis (UVCP), grade and breathiness showed a very good correlation with CPP, and also good correlation with jitter, shimmer, NHR, and MPT. Also asthenia showed good correlation with CPP and MPT. Vocal polyp has a limited association with other diseases. Conclusion In patients with dysphonia, grade and breathiness showed good correlation with CPP, jitter, and shimmer, and reflect the state of voice change well especially in UVCP, CPP, and MPT.

A 125 MHz CMOS Delay-Locked Loop with 32-phase Output Clock (32 위상의 출력 클럭을 가지는 125 MHz CMOS 지연 고정 루프)

  • Lee, Kwang-Hun;Jang, Young-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.1
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    • pp.137-144
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    • 2013
  • A delay-locked loop (DLL) that generates a 32-phase clock with the operating frequency of 125 MHz is introduced. The proposed DLL uses a delay line of $4{\times}8$ matrix architecture to improve a differential non-linearity (DNL) of the delay line. Furthermore, a integral non-linearity (INL) of the proposed DLL is improved by calibrating phases of clocks that is supplied to four points of an input stage of the $4{\times}8$ matrix delay line. The proposed DLL is fabricated by using $0.11-{\mu}m$ CMOS process with a 1.2 V supply. The measured operating frequency range of the implemented DLL is 40 MHz to 280 MHz. At the operating frequency of 125MHz, the measurement results shows that the DNL and INL are +0.14/-0.496 LSB and +0.46/-0.404 LSB, respectively. The measured peak-to-peak jitter of the output clock is 30 ps when the peak-to-peak jitter of the input clock is 12.9 ps. The area and power consumption of the implemented DLL are $480{\times}550{\mu}m^2$ and 9.6 mW, respectively.

Performance Management and Analysis for Guaranteed End-to-End QoS Provisioning on MPLS-based Virtual Private LAN Service(VPLS)

  • Kim, Seong-Woo;Kim, Chul;Kim, Young-Tak
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.2B
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    • pp.144-156
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    • 2003
  • Internet/Intranet has been continuously enhanced by new emerging IP technologies such as differentiate service(DiffServ), IPSec(IP Security) and MPLS(Multi-protocol Label Switching) traffic engineering. According to the increased demands of various real-time multimedia services, ISP(Internet Service Provider) should provide enhanced end-to-end QoS(quality of service) and security features. Therefore, Internet and Intranet need the management functionality of sophisticated traffic engineering functions. In this paper, we design and implement the performance management functionality for the guaranteed end-to-end QoS provisioning on MPLS-based VPLS(Virtual Private LAN Service). We propose VPLS OAM(Operation, Administration and Maintenance) for efficient performance management. We focus on a scheme of QoS management and measurement of QoS parameters(such as delay, jitter, loss, etc.) using VPLS OAM functions. The proposed performance management system also supports performance tuning to enhance the provided QoS by re-adjusting the bandwidth of LSPs for VPLS. We present the experimental results of performance monitoring and analysis using a network simulator.

High Speed Memory Module

  • Yu, Hyo-Suk
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2006.10a
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    • pp.293-316
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    • 2006
  • [ $\blacksquare$ ] I/O Signal $\square$ We see adequate margin for the RC B design $\square$ Minimum ODW value is 328ps using Ac to DC measurement for the read case. $\square$ Minimum ODW value is 350ps using AC to DC mesurement method for the write case. $\blacksquare$ CLK Signal $\square$ The slew-rate decreases when the Cterm value increases $\square$ Lower slew-rate could effect delay and jitter. $\square$ There are some ldge issues during transitions with lower Cterm and without Cterm. $\square$ Our recommendation for the Cterm value range is between 1.5pF to 2.4pF. $\blacksquare$ ADD/CMD/Ctrl Signal $\square$ High output slew-rate at low VDD causes ring back that reduces voltage margin because of x-talk. $\square$ 30ohm Rterm for the CTRL signal shows a better signal integrity result compared to 36ohm.

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