• Title/Summary/Keyword: interface-controlled junctions

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Fabrication of interface-controlled Josephson Junctions by Ion beam damage

  • 김상협;김준호;성건용
    • Progress in Superconductivity
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    • v.3 no.2
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    • pp.168-171
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    • 2002
  • We have demonstrated ramp-edge Josephson junctions using high temperature superconductors without depositing artificial barriers. We fabricated a surface barrier formed naturally during an ion beam etching process and the annealing under the oxygen atmosphere. The experimental results imply that the barrier natures such as the resistivity are varied by the annealing conditions and the ion milling conditions including the beam voltages. Thus, the ann eating and etching conditions should be optimized to obtain excellent junction properties. In optimizing the fabricating factors, the interface-controlled junctions showed resistively shunted junctions like current-voltage characteristics and an excellent uniformity. These junctions exhibited a spread ($1\sigma$) of $I_{c}$ is 10% fur chips containing 7 junctions at 50K.K.

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Fabrication of interface-controlled Josephson junctions using Sr$_2$AlTaO$_6$ insulating layers

  • Kim, Jun-Ho;Choi, Chi-Hong;Sung, Gun-Yong
    • 한국초전도학회:학술대회논문집
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    • v.10
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    • pp.165-168
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    • 2000
  • We fabricated ramp-edge Josephson junctions with barriers formed by interface treatments instead of epitaxially grown barrier layers. A low-dielectric Sr$_2$AlTaO$_6$(SAT) layer was used as an ion-milling mask as well as an insulating layer for the ramp-edge junctions. An ion-milled YBa$_2$Cu$_3$O$_{7-x}$ (YBCO)-edge surface was not exposed to solvent through all fabrication procedures. The barriers were produced by structural modification at the edge of the YBCO base electrode using high energy ion-beam treatment prior to deposition of the YBCO counter electrode. We investigated the effects of high energy ion-beam treatment, annealing, and counter electrode deposition temperature on the characteristics of the interface-controlled Josephson junctions. The junction parameters such as T$_c$, I$_c$c, R$_n$ were measured and discussed in relation to the barrier layer depending on the process parameters.

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Design and Fabrication of High Temperature Superconducting Rapid Single Flux Quantum T Flip-Flop (고온 초전도 단자속 양자 T 플립 플롭 설계 및 제작)

  • Kim, J. H.;Kim, S. H.;Jung, K. R.;Kang, J. H.;Syng, G. Y.
    • Progress in Superconductivity
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    • v.3 no.1
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    • pp.87-90
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    • 2001
  • We designed a high temperature superconducting rapid single flux quantum(RSFQ) T flip-flop(TFF) circuit using Xic and WRspice. According to the optimized circuit parameters, we fabricated the TFF circuit with $Y_1$$Ba_2$Cu$_3$$O_{7-x}$(YBCO) interface-controlled Josephson junctions. The whole circuit was comprised of five epitaxial layers including YBCO ground plane. The interface-controlled Josephson junction was fabricated with natural junction barrier that was formed by interface-treatment process. In addition, we report second design for a new flip-flop without ground palne.e.

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Operation of a Single Flux Quantum 4-stage Shift Register Fabricated with High $T_c$ Ramp-edge Junction Technology (고온 초전도 경사형 모서리 접합을 이용한 4단 쉬프트 레지스터의 동작)

  • Kim, J. H.;Park, J. H.;Kim, S. H.;Jung, K. R.;Kang, J. H.;Sung, G. Y.;Hahn, T. S.
    • Progress in Superconductivity
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    • v.3 no.1
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    • pp.83-86
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    • 2001
  • We have fabricated a single flux quantum 4-stage shift register with interface-controlled $Y_1$$Ba_2$$Cu_3$$O_{7-x}$(YBCO) Josephson junction. The YBCO Josephson junctions showed RSJ-like current-voltage(I-V) curves at temperatures 45~80K. We tested load and shift operation of shift register with binary data sequences “1000”, “1010”, “1011”, and “1111” at 58K. For all the binary data sequences, the shift register operated successfully. By operating the circuit with proper current pulses, we observed no errors during at least 12 hours operation for all the data sequences.s.

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