• Title/Summary/Keyword: interface charge

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Research trend in the development of charge transport materials to improve the efficiency and stability of QLEDs (QLEDs 효율 및 안정성 향상을 위한 전하 수송 소재 개발 동향)

  • Gim, Yejin;Park, Sujin;Lee, Donggu;Lee, Wonho
    • Journal of Adhesion and Interface
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    • v.23 no.2
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    • pp.17-24
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    • 2022
  • Colloidal quantum dots (QDs) have gained attention for applications in quantum dot light emitting diodes (QLEDs) due to their high photoluminescence quantum yield, narrow emission spectra, and tunable bandgap. Nevertheless, non-radiative recombination induced by electron and hole imbalance deteriorates the device efficiency and stability. To overcome the problem, researchers have been trying to enhance hole transport properties of hole transporting layers (HTL) and/or slow down the electron injection in electron transport layer (ETL). Here, we summarize two approaches: i) development of interfacial materials between QD and ETL (or HTL); ii) engineering of HTL by blending or multi-layer approaches.

Analysis of Positive Bias Temperature Instability Degradation Mechanism in n+ and p+ poly-Si Gates of High-Voltage SiO2 Dielectric nMOSFETs (고전압 SiO2 절연층 nMOSFET n+ 및 p+ poly Si 게이트에서의 Positive Bias Temperature Instability 열화 메커니즘 분석)

  • Yeohyeok Yun
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.16 no.4
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    • pp.180-186
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    • 2023
  • Positive bias temperature instability (PBTI) degradation of n+ and p+ poly-Si gate high-voltage(HV) SiO2 dielectric nMOSFETs was investigated. Unlike the expectation that degradation of n+/nMOSFET will be greater than p+/nMOSFET owing to the oxide electric field caused by the gate material difference, the magnitude of the PBTI degradation was greater for the p+/nMOSFET than for the n+/nMOSFET. To analyze the cause, the interface state and oxide charge were extracted for each case, respectively. Also, the carrier injection and trapping mechanism were analyzed using the carrier separation method. As a result, it has been verified that hole injection and trapping by the p+ poly-Si gate accelerates the degradation of p+/nMOSFET. The carrier injection and trapping processes of the n+ and p+ poly-Si gate high-voltage nMOSFETs in PBTI are detailed in this paper.

UV Photo Response Driven by Pd Nano Particles on LaAlO3/SrTiO3 Using Ambient Control Kelvin Probe Force Microscopy

  • Kim, Haeri;Chan, Ngai Yui;Dai, Jiyan;Kim, Dong-Wook
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.207.1-207.1
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    • 2014
  • High-mobility and two dimensional conduction at the interface between two band insulators, LaAlO3 (LAO) and SrTiO3 (STO), have attracted considerable research interest for both applications and fundamental understanding. Several groups have reported the photoconductivity of LAO/STO, which give us lots of potential development of optoelectronic applications using the oxide interface. Recently, a giant photo response of Pd nano particles/LAO/STO is observed in UV illumination compared with LAO/STO sample. These phenomena have been suggested that the correlation between the interface and the surface states significantly affect local charge modification and resulting electrical transport. Water and gas adsorption/desorption can alter the band alignment and surface workfunction. Therefore, characterizing and manipulating the electric charges in these materials (electrons and ions) are crucial for investigating the physics of metal oxide. Proposed mechanism do not well explain the experimental data in various ambient and there has been no quantitative work to confirm these mechanism. Here, we have investigated UV photo response in various ambient by performing transport and Kelvin probe force microscopy measurements simultaneously. We found that Pd nano particles on LAO can form Schottky contact, it cause interface carrier density and characteristics of persistence photo conductance depending on gas environment. Our studies will help to improve our understanding on the intriguing physical properties providing an important role in many enhanced light sensing and gas sensing applications as a catalytic material in different kinds of metal oxide systems.

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Influence of gate insulator treatment on Zinc Oxide thin film transistors.

  • Kim, Gyeong-Taek;Park, Jong-Wan;Mun, Yeon-Geon;Kim, Ung-Seon;Sin, Sae-Yeong
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2010.05a
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    • pp.54.2-54.2
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    • 2010
  • 최근까지는 주로 비정질 실리콘이 디스플레이의 채널층으로 상용화 되어왔다. 비정질 실리콘 기반의 박막 트랜지스터는 제작의 경제성 및 균일성을 가지고 있어서 널리 상용화되고 있다. 하지만 비정질 실리콘의 구조적인 문제인 낮은 전자 이동도(< $1\;cm^2/Vs$)로 인하여 디스플레이의 대면적화에 부적합하며, 광학적으로 불투명한 특성을 갖기 때문에 차세대 디스플레이의 응용에 불리한 점이 있다. 이런 문제점의 대안으로 현재 국내외 여러 연구 그룹에서 산화물 기반의 반도체를 박막 트랜지스터의 채널층으로 사용하려는 연구가 진행중이다. 산화물 기반의 반도체는 밴드갭이 넓어서 광학적으로 투명하고, 상온에서 증착이 가능하며, 비정질 실리콘에 비해 월등히 우수한 이동도를 가짐으로 디스플레이의 대면적화에 유리하다. 특히 Zinc Oxide의 경우, band gap이 3.4eV로써, transparent conductors, varistors, surface acoustic waves, gas sensors, piezoelectric transducers 그리고 UV detectors 등의 많은 응용에 쓰이고 있다. 또한, a-Si TFTs에 비해 ZnO-based TFTs의 경우 우수한 소자 성능과 신뢰성을 나타내며, 대면적 제조시 우수한 균일성 및 낮은 생산비용이 장점이다. 그러나 ZnO-baesd TFTs의 경우 일정한 bias 아래에서 threshold voltage가 이동하는 문제점이 displays의 소자로 적용하는데 매우 중요하고 문제점으로 여겨진다. 특히 gate insulator와 channel layer사이의 interface에서의 defect에 의한 charge trapping이 이러한 문제점들을 야기한다고 보고되어진다. 본 연구에서는 Zinc Oxide 기반의 박막 트랜지스터를 DC magnetron sputtering을 이용하여 상온에서 제작을 하였다. 또한, $Si_3N_4$ 기판 위에 electron cyclotron resonance (ECR) $O_2$ plasma 처리와 plasma-enhanced chemical vapor deposition (PECVD)를 통하여 $SiO_2$ 를 10nm 증착을 하여 interface의 개선을 시도하였다. 그리고 TFTs 소자의 출력 특성 및 전이 특성을 평가를 하였고, 소자의 field effect mobility의 값이 향상을 하였다. 또한 Temperature, Bias Temperature stability의 조건에서 안정성을 평가를 하였다. 이러한 interface treatment는 안정성의 향상을 시킴으로써 대면적 디스플레의 적용에 비정질 실리콘을 대체할 유력한 물질이라고 생각된다.

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Performance Improvement of All Solution Processable Organic Thin Film Transistors by Newly Approached High Vacuum Seasoning

  • Kim, Dong-Woo;Kim, Hyoung-Jin;Lee, Young-Uk;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.470-470
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    • 2012
  • Organic thin film transistors (OTFTs) backplane constitute the active elements in new generations of plastic electronic devices for flexible display. The overall OTFTs performance is largely depended on the properties and quality of each layers of device material. In solution based process of organic semiconductors (OSCs), the interface state is most impediments to preferable performance. Generally, a threshold voltage (Vth) shift is usually exhibited when organic gate insulators (OGIs) are exposed in an ambient air condition. This phenomenon was caused by the absorbed polar components (i.e. oxygen and moisture) on the interface between OGIs and Soluble OSCs during the jetting process. For eliminating the polar component at the interface of OGI, the role of high vacuum seasoning on an OGI for all solution processable OTFTs were studied. Poly 4-vinly phenols (PVPs) were the material chosen as the organic gate dielectric, with a weakness in ambient air. The high vacuum seasoning of PVP's surface showed improved performance from non-seasoning TFT; a $V_{th}$, a ${\mu}_{fe}$ and a interface charge trap density from -8V, $0.018cm^2V^{-1}s^{-1}$, $1.12{\times}10^{-12}(cm^2eV)^{-1}$ to -4.02 V, $0.021cm^2V^{-1}s^{-1}$, $6.62{\times}10^{-11}(cm^2eV)^{-1}$. These results of OTFT device show that polar components were well eliminated by the high vacuum seasoning processes.

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Electrical and Reliability properties of MOS capacitors with $N_{2}O$ oxides ($N_{2}O$ 산화막을 갖는 MOS 캐패시터의 전기적 및 신뢰성 특성)

  • 이상돈;노재성;김봉렬
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.6
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    • pp.117-127
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    • 1994
  • In this paper, electrical and reliability properties of N$_2$O oxides, grown at the temperature of 95$0^{\circ}C$ and 100$0^{\circ}C$ to 74$\AA$, and 82$\AA$. respectively, using NS12TO gas in a conventional furnace, have been compared with those of pure oxide grown at the temperature of 850 to 84$\AA$ using O$_2$ gas. Initial IS1gT-VS1gT characteristics of N$_2$O oxides were similar to those of pure oxide, and reliability properties of N$_2$O oxides, such as charge trapping, interface state density and leakage current at low electric field under F-N stress, were improved much better than those of pure oxide. But, with increasing capacitor area. TDDB characteristics of N$_2$O oxides were more degraded than those of pure oxide and this degradation of TDDB characteristics was more severe in 100$0^{\circ}C$ N$_2$Ooxide than in 95$0^{\circ}C$ N$_2$O oxide. The improvement of reliability properties excluding TDDB in N$_2$Ooxides was attributed to the hardness of the interface improved by nitrogen pile-up at the interface of Si/SiO$_2$, but on the other hand, the degradation of TDDB characteristics in N$_2$O oxides was obsered due to the increase of local thinning spots caused by excessive nitrogen at interface during the growth of N$_2$O oxides.

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Enhanced Environmental Stability of Graphene Field-Effect Transistors through Interface Control (계면 제어를 통한 그래핀 기반 전계효과 트랜지스터의 환경 안정성 향상)

  • Seong, Jun Ho;Lee, Dong Hwa;Lee, Eunho
    • Journal of Adhesion and Interface
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    • v.23 no.3
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    • pp.75-79
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    • 2022
  • Graphene is a two-dimensional carbon allotrope composed of honeycomb sp2 hybrid orbital bonds. It shows excellent electrical and mechanical properties and has been spotlighted as a core material for next-generation electronic devices. However, it exhibits low environmental stability due to the easy penetration or adsorption of external impurities from the formation of an unstable interface between the materials in the electronic devices. Therefore, this work aims to improve and investigate the low environmental stability of graphene-based field-effect transistors through direct growth using solid hydrocarbons as a precursor of graphene. Graphene synthesized from direct growth shows high electrical stability through reduction of change in charge mobility and Dirac voltage. Through this, a new approach to utilize graphene as a core material for next-generation electronic devices is presented.

Effects of Immobilized Bipolar Interface Formed by Multivalent and Large Molecular Ions on Electrodialytic Water Splitting at Cation-Exchange Membrane Surface (양이온교환막 표면의 전기투석 물분해에서 다가의 큰 이온성분자에 의해 형성된 고정층 바이폴라 계면의 영향)

  • Seung-Hyeon Moon;Moon-Sung Kang;Yong-Jin Choi
    • Membrane Journal
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    • v.13 no.3
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    • pp.143-153
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    • 2003
  • The effects of bipolar interface formed on the surface of cation-exchange membrane on water splitting phenomena were investigated. Results showed that the formation of immobilized bipolar interface resulted in significant water splitting during electrodialysis. In particular, the immobilized bipolar interface was easily created on the cation-exchange membrane surface in the electrodialytic systems where multivalent cations served as an electrolyte. Multivalent cations with low solubility product resulted in violent water splitting because they were easily precipitated on the membrane surface in hydroxide form. Therefore, the bipolar interface consisting of H- and OH-affinity groups were formed on the membrane-solution interface. Apparently, water splitting was largely activated with the help of strong electric fields generated between the metal hydroxide layer and fixed charge groups on the membrane surface. Likewise, the accumulation of large molecular counter ions on the membrane surface led to the formation of a fixed bipolar structure that could cause significant water splitting in the over-limiting current region. Therefore, the prevention of the immobilization of bipolar interface on the membrane surface is very essential in improving the process efficiency in a high-current operation.

Al$_2$O$_3$ formation on Si by catalytic chemical vapour deposition

  • Ogita, Yoh-Ichiro;Shinshi Iehara;Toshiyuki Tomita
    • Electrical & Electronic Materials
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    • v.16 no.9
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    • pp.63.1-63
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    • 2003
  • Catalytic chemical vapor deposition (Cat-CVD) has been developed to deposit alumina(Al$_2$O$_3$) thin films on silicon (Si) crystal using N$_2$ bubbled tir-methyl aluminium [Al(CH$_3$)$_3$, TMA] and molecular oxygen (O$_2$) as source species and tungsten wires as a catalyzer. The catalyzer dissociated TMA at approximately 600$^{\circ}C$ The maximum deposition rate was 18 nm/min at a catalyzer temperature of 1000 and substrate temperature of 800$^{\circ}C$. Metal oxide semiconductor (MOS) diodes were fabricated using gates composed of 32.5-nm-thick alumina film deposited as a substrate temperature of 400oC. The capacitance measurements resulted in a relatively dielectric constant of 7, 4, fixed charge density of 1.74*10e12/$\textrm{cm}^2$, small hysteresis voltage of 0.12V, and very few interface trapping charge. The leakage current was 5.01*10e-7 A/$\textrm{cm}^2$ at a gate bias of 1V.

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Characteristics of Silicon Oxide Films Grown by Rapid Thermal Oxidation (급속일산화법에 의한 실리콘 산화막의 특성)

  • 이귀연;양두영;이재용
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.28A no.12
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    • pp.59-64
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    • 1991
  • Thin (25-103$\AA$) SiO$_2$ films are grown using the rapid thermal oxidation processing at temperatures of 105$0^{\circ}C$-115$0^{\circ}C$ for 5-30 sec, in order to investigate the characteristics of ultra thin oxide. For measuring the thickness of oxide TEM, ellipsometry, and C-V method which is taken in the condition of small surface band bending are used and compared. When neglecting the small deviation affected by both interface state and moisture charge effect, those three methods described above give similar results. In order to examine the effect of rapid thermal annealing, part of samples are annealed in N$_2$ ambient. MOS capacitors are fabricated and the characteristics of I-V and C-V are measured. Measurements show that the activation energy of initial thickness of oxide grown during the ramp-up time is of 1.125eV and the activation energy of the oxidation rate is of 0.98eV. As oxidation temperature is increased, dielectric breakdown field E$_{BD}$ is decreased due to the increase of fixed charge density N$_f$ However, E$_{BD}$ is shown to be decreased as increasing the thickness of oxide. The increase of N$_f$ in the early stage of thermal annealing results in the decrease of E$_{BD}$.

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