• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.33 no.4
• /
• pp.281-285
• /
• 2020

Oxide semiconductor devices have become increasingly important because of their high mobility and good uniformity. The channel length of oxide semiconductor thin film transistors (TFTs) also shrinks as the display resolution increases. It is well known that reducing the channel length of a TFT is detrimental to the current saturation because of drain-induced barrier lowering, as well as the movement of the pinch-off point. In an organic light-emitting diode (OLED), the lack of current saturation in the driving TFT creates a major problem in the control of OLED current. To obtain improved current saturation in short channels, we fabricated indium gallium zinc oxide (IGZO) TFTs with single gate and double gate structures, and evaluated the electrical characteristics of both devices. For the double gate structure, we connected the bottom gate electrode to the source electrode, so that the electric potential of the bottom gate was fixed to that of the source. We denote the double gate structure with the bottom gate fixed at the source potential as the BGFP (bottom gate with fixed potential) structure. For the BGFP TFT, the current saturation, as determined by the output characteristics, is better than that of the conventional single gate TFT. This is because the change in the source side potential barrier by the drain field has been suppressed.

• Journal of Sensor Science and Technology
• /
• v.33 no.1
• /
• pp.56-61
• /
• 2024

The quality of the display can be managed by effectively managing the temperature generated by the panel during use. Conventional display panels rely on an external reference resistor for temperature monitoring. However, this approach is easily affected by external factors such as temperature variations from the driving circuit and chips. These variations reduce reliability, causing complicated mounting owing to the external chip, and cannot monitor the individual pixel temperatures. However, this issue can be simply and efficiently addressed by integrating temperature sensors during the display panel manufacturing process. In this study, we fabricated and analyzed a temperature sensor integrated into an a-IGZO (amorphous indium-gallium-zinc-oxide) TFT array that was to precisely monitor temperature and prevent the deterioration of OLED display pixels. The temperature sensor was positioned on top of the oxide TFT. Simultaneously, it worked as a light shield layer, contributing to the reliability of the oxide. The characteristics of the array with integrated temperature sensors were measured and analyzed while adjusting the temperature in real-time. By integrating a temperature sensor into the TFT array, monitoring the temperature of the display became easier and more accurate. This study could contribute to managing the lifetime of the display.

• Journal of the Korean Vacuum Society
• /
• v.21 no.4
• /
• pp.205-211
• /
• 2012

We investigated the optical and hydrophobic properties of the deposited silver (Ag) zinc oxide (ZnO) nanorods (NRs) on flexible indium tin oxide (ITO) coated polyethylene terephthalate (PET) substrates (i.e., ITO/PET). The ZnO NRs were grown by an electrochemical deposition using a sputtered ZnO seed layer and the Ag was deposited by using a thermal evaporator. For comparison, the same fabrication process was carried out on the bare ITO/PET without ZnO NRAs. Due to the discrete surface of ZnO NRs, the deposited Ag was formed as nano-scale particles, while the Ag became film-like for bare ITO/PET. In order to control the size and amount of Ag particles, the Ag deposition time was changed from 100 to 600 s. When the deposition time was increased, the Ag particles became larger and denser, and the absorptance was increased. This enhanced absorptance may be due to the localized surface plasmon resonance of Ag particles. Furthermore, the relatively high hydrophobicity was observed for the deposited Ag on the ZnO NRs/ITO/PET. These improved optical and surface properties are expected to be useful for flexible photovoltaic and optoelectronic devices.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.341-341
• /
• 2012

Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.02a
• /
• pp.455-455
• /
• 2010

차세대 디스플레이로 널리 알려져 있는 플렉서블 디스플레이는 휴대하기 쉽고, 깨지지 않으며, 변형이 자유로워 현재 우리 사회에 크게 주목받고 있다. 플렉서블 디스플레이의 구현을 위해서는 기존의 유리 기반 디스플레이 소자 기술에 더하여 플렉서블 기판소재에 적용 가능한 투명전도막 기술의 확립이 필요하다. 디스플레이 산업에서 주로 사용되는 투명전도막은 ITO (indium tin oxide) 및 IZO (indium zinc oxide)와 같은 투명전도성 산화물 박막 (TCO, transparent conducting oxide)이다. 그런데 플라스틱 기판이 굽힘 환경에 놓이게 되면 그 위에 증착된 산화물 박막이 쉽게 파손될 수 있다. 따라서 플렉서블 디스플레이 기술에 있어서 변형에 따른 TCO 박막의 파괴 거동에 대한 연구가 필수적이다. 본 연구에서는 PET (polyethylene terephthalate) 기판 상에 증착된 IZO 박막의 반복 굽힘 시 계면구조 변화에 따른 파괴거동을 조사하였다. 플라스틱 기판의 사용을 위해서는 산소 및 수분의 투과 방지막이 필요하며 본 연구에서는 투과 방지막 (또는 보호막)으로서 $SiO_x$ 박막을 적용하였다. IZO 박막은 $In_2O_3$ - 10 wt% ZnO 타겟을 사용하여 RF magnetron sputtering법으로 $100^{\circ}C$ 미만에서 저온 증착하였다. 보호막으로 사용되는 $SiO_x$ 박막은 HMDSO (hexamethyldisiloxane)와 Ar 및 $O_2$ 혼합기체를 이용하는 PECVD 방법으로 합성하였다. 변형에 따른 TCO 박막의 파괴 거동을 조사하기 위하여 반복 굽힘 시험 (cyclic- bending test)을 실시하였다. 반복 굽힘 시험 중 실시간으로 IZO 박막의 전기저항 변화를 측정하여 박막의 파괴 거동을 모니터링 하였다. 시편 A (135 nm-thick IZO/PET), B (135 nm-thick IZO/ 90 nm-thick $SiO_x$/PET), C (135nm-thick IZO/ 300 nm-thick $SiO_x$/PET)에 대하여 곡지름 35mm, 1000회 반복 굽힘을 실시하여 변형 중의 전기저항 변화를 조사하였다. 그리고 굽힘 시험 완료 후, FE-SEM을 이용한 시편 표면형상 관찰을 통하여 균열생성 정도를 관찰하였다. 반복 굽힘 시험 결과, A 와 C 시편의 경우, 각각 반복 굽힘 20회, 550회에서 급격한 전기저항의 증가가 관찰되었다. 그러나 B 시편의 경우, 1000회 반복 굽힘 후에도 전기저항의 변화는 나타나지 않았다. 이와 같이 반복 굽힘에 의한 IZO 박막의 파괴 거동 변화는 IZO 박막과 기판의 계면구조변화에 기인한 것으로 해석된다. IZO 박막과 기판의 계면에 $SiO_x$ 층을 삽입함으로써 계면 접합강도가 향상되었을 것으로 추측된다. 따라서 변형에 대한 파괴 저항 특성이 우수한 투명전도성 산화물 박막의 형성을 위해서는 적절한 계면구조 제어를 통한 계면 접합 특성의 향상이 필요하다.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.08a
• /
• pp.165-165
• /
• 2012

비정질의 Tantalum-indium-zinc oxide (TIZO) 박막 트랜지스터는 RF-sputtering 방법으로 증착되었으며 소결된 단일 타겟을 사용하였다. 증착당시 반응 가스는 알곤과 산소를 95 : 5로 섞어 반응성 스퍼터링을 진행하였으며, 1 mtorr에서 5 mtorr까지 다양한 공정압력에서 증착한 이 후 Furnace system을 통하여 $350^{\circ}C$의 온도로 1시간 동안 후열처리 공정을 진행하였다. 비정질 TIZO 박막을 활성 층으로 사용하여 제작한 박막 트랜지스터는 공정압력이 낮아짐에 따라 높은 이동도와 낮은 subthrehsold gate swing 보였다. 이러한 현상의 원인을 규명하고자 물리적, 전기적, 광학적 분석을 통하여 공정압력의 변화가 박막 트랜지스터 구동에 미치는 영향을 해석하였다. 우선 공정압력에 따른 TIZO 박막의 Ta, In, Zn, O 각각의 조성을 분석하기 위하여 Rutherford back scattering (RBS) 분석을 실시하였다. 또한 X-선 회절(X-ray diffraction)분석을 통해 열처리된 TIZO 박막은 공정압력에 따라 물리적 구조의 변화를 일으키지 않으며 모든 박막은 비정질상을 보이는 것을 확인하였다. 3.3eV의 광학적 밴드 갭은 기존에 보고되었던 비정질 산화물 반도체(InGaZnO, HfInZnO 등)와도 유사한 밴드갭을 가지고 있음을 확인하였다. 또한, spectroscopic ellipsometry (SE)분석을 통하여 전도대 이하 밴드 갭 내에 존재하는 결함상태 및 전도대에서 결함상태까지의 에너지 준위 그리고 공정압력에 따라 결함의 양과 발생되는 에너지 준위가 변화하는 현상을 관측하였다. 박막을 제조 할 때의 공정압력은 박막 내의 결함의 양 및 발생되는 에너지 준위의 변화를 야기하고 변화된 결함의 양과 발생된 에너지 준위에 따라 박막트랜지스터의 전기적 특성을 변화시킨다는 결과를 도출하였다.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2015.08a
• /
• pp.163-163
• /
• 2015

The effect of nematic liquid crystal(5CB-4-Cyano-4'-pentylbiphenyl) on the amorphous indium gallium zinc oxide thin film transistors(a-IGZO TFTs) was investigated. Through dropping the 5CB on the a-IGZO TFT's channel layer which is deposited by RF-magnetron sputtering, properties of a-IGZO TFTs was dramatically improved. When drain bias was induced, 5CB molecules were oriented by Freedericksz transition generating positive charges to one side of dipoles. From increment of the capacitance by orientation of liquid crystals, the drain current was increased, and we analyzed these phenomena mathematically by using MOSFET model. Transfer characteristic showed improvement such as decreasing of subthreshold slope(SS) value 0.4 to 0.2 and 0.45 to 0.25 at linear region and saturation region, respectively. Furthermore, in positive bias system(PBS), prevention effect for electron trapping by 5CB liquid crystal dipoles was observed, which showing decrease of threshold voltage shift [(${\delta}V$]_TH) when induced +20V for 1~1000sec at the gate electrode.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2004.08a
• /
• pp.1244-1247
• /
• 2004

For obtaining the best panel quality of color filter on array(COA) architecture in TFF LCD, we investigated the influence of deposition temperature, $O_2$ flow, thickness on the optical transmittance, wet etching and adhesion properties of IZO deposited onto each color photo resist(red, green, blue). Average transmittance of the pixel single layer in the visible range(between 380 and 780nm) was mainly affected by thickness and showed maximum at 1250 ${\AA}$ while the thickness showing peak transparency in each R, G, B wavelength was different. The relation was calculated by using bi-layer transmission and reflectance model, which corresponded to experimental data very well. The adhesion of IZO deposited on each color PR was found to have enhanced value except red PR case, compared to that of IZO which was deposited on $SiN_x$. Wet etching pattern linearity was decreased as the thickness increased. The thickness of IZO was one of vital factors in order to optimize overall pixel process for fabricating COA structure.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.203-204
• /
• 2009

The Indium Zinc Tin Oxide (IZTO) thin films for flexible display electrode were deposited on poly carbonate (PC) and polyethersulfone(PES) and glass substrates at room temperature by facing targets sputtering (FTS). Two different kinds of targets were installed on FTS system. One is ITO ($In_2O_3$ 90 wt.%, $SnO_2$ 10 wt.%), the other is IZO ($In_2O_3$ 90 wt.%, ZnO 10 wt.%). As-deposited IZTO thin films were investigated by a UV/VIS spectrometer, an X-ray diffractometer (XRD), an atomic force microscope (AFM) and a Hall Effect measurement system. As a result, we could prepare the IZTO thin films with the resistivity of under $10^{-4}\;[{\Omega}{\cdot}cm]$ and IZTO thin films deposited on glass substrate showed an average transmittance over 80% in visible range (400~800 nm) in all IZTO thin films except in IZTO thin film deposited at $O_2$ gas flow rate of 0.1[sccm].

• Proceedings of the KIEE Conference
• /
• 2011.07a
• /
• pp.1453-1454
• /
• 2011

We have investigated the effect of silicon contents (0~0.4 molar ratios) on the performance of solution processed silicon-indium-zinc oxide (SIZO) thin-film transistors (TFTs). Despites its solution processed channel layer, low annealed temperature below $200^{\circ}C$ in air has been used for SIZO-TFTs. The $V_{th}$ is shifted from -4.04 to 5.15 V as increasing Si ratio in the SIZO-TFTs. The positive shift of $V_{th}$ as increasing Si contents in SIZO system indicates that Si suppresses the carrier generation in the active channel layer since $V_{th}$ is defined as the voltage required accumulating sufficient charge carriers to form a conductive channel path.