• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.526-532
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• 2015

We quantitatively investigated instability mechanisms under simultaneous positive gate and drain bias stress (SPGDBS) in self-aligned top-gate amorphous indium-zinc-oxide thin-film transistors. After SPGDBS ($V_{GS}=13V$and $V_{DS}=13V$), the parallel shift of the transfer curve into a negative $V_{GS}$ direction and the increase of on current were observed. In order to quantitatively analyze mechanisms of the SPGDBS-induced negative shift of threshold voltage (${\Delta}V_T$), we experimentally extracted the density-of-state, and then analyzed by comparing and combining measurement data and TCAD simulation. As results, 19% and 81% of ${\Delta}V_T$ were taken to the donor-state creation and the hole trapping, respectively. This donor-state seems to be doubly ionized oxygen vacancy ($V{_O}^{2+}$). In addition, it was also confirmed that the wider channel width corresponds with more negative ${\Delta}V_T$. It means that both the donor-state creation and hole trapping can be enhanced due to the increase in self-heating as the width becomes wider. Lastly, all analyzed results were verified by reproducing transfer curves through TCAD simulation.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.479-479
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• 2011

Flexible inverters based on complementary thin-film transistor (CTFTs) are important because they have low power consumption and other advantages over single type TFT inverters. In addition, integrated CTFTs in flexible electronic circuits on low-cost, large area and mechanically flexible substrates have potentials in various applications such as radio-frequency identification tags (RFIDs), sensors, and backplanes for flexible displays. In this work, we introduce flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The CTFTs were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. Basic electrical characteristics of individual transistors and the whole CTFTs were measured by a semiconductor parameter analyzer (HP4145B, Agilent Technologies) at room temperature in the dark. Performance of those devices then was measured under static and dynamic mechanical deformation. Effects of cyclic bending were also examined. The voltage transfer characteristics (Vout- Vin) and voltage gain (-dVout/dVin) of flexible inverter circuit were analyzed and the effects of mechanical bending will be discussed in detail.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.467-468
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• 2006

We report on the fabrication of P3HT-based thin-film transistors (TFT) that consist of indium-zinc-oxide (IZO), PVP (poly-vinyl phenol), and Ni for the source-drain (S/D) electrode, gate dielectric, and gate electrode, respectively. The IZO S/D electrodes of which the work function is well matched to that of P3HT were deposited on a P3HT channel by thermal evaporation of IZO and showed a moderately low but still effective transmittance of ~25% in the visible range along with a good sheet resistance of ${\sim}60{\Omega}/{\square}$. The maximum saturation current of our P3HT-based TFT was about $15{\mu}A$ at a gate bias of -40V showing a high field effect mobility of $0.05cm^2/Vs$ in the dark, and the on/off current ratio of our TFT was about $5{\times}10^5$. It is concluded that jointly adopting IZO for the S/D electrode and PVP for gate dielectric realizes a high-quality P3HT-based TFT.

• Transactions on Electrical and Electronic Materials
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• v.13 no.1
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• pp.47-49
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• 2012

In this paper, we investigated the anomalous hump in the bottom gate staggered a-IGZO TFTs. During the positive bias stress, a positive threshold voltage shift was observed in the transfer curve and an anomalous hump occurred as the stress time increased. The hump became more serious in higher gate bias stress while it was not observed under the negative bias stress. The analysis of constant gate bias stress indicated that the anomalous hump was influenced by the migration of positively charged mobile interstitial zinc ion towards the top side of the a-IGZO channel layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.10
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• pp.828-834
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• 2001

Zinc oxide (ZnO) films deposited on indium (In) films were post-annealed in a rapid thermal anealing (RTA) system. The ZnO/In films were RTA-treated in air or a vacuum ambient. The crystallographic properties and surface morphologies of the films were studied before and after the RTA by X-ray diffraction(XRD) and scanning electron microscopy (SEM), respectively. The resistivity variation of the films with RTA temperature and time was measured by the 4-point probe method. Auger electron spectroscopy (AES) was carried out to figure out the redistribution of indium atoms in the ZnO films. The resistivity of the ZnO/In films decreased to 2$\times$10$\^$-3/ Ωcm by diffusion of the In. The In diffusion into the ZnO films roughened the surface of ZnO films. The results of depth profile by AES showed a hump of In atoms around ZnO/In interface after the RTA at 800 $\^{C}$. The effects of temperature time and ambient during the RTA on the structural and electrical properties of the ZnO/In films were discussed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.183-183
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• 2009

OLED소자의 양극재료로써 현재는 산화인듐주석(ITO : indium tin oxide) 박막이 널리 이용되고 있다. 그러나 낮은 전기 비저항과 높은 투과도를 갖는 ITO 박막을 얻기 위해서는 $300^{\circ}C$ 이상의 고온에서 성막되어야 하며, 원료 물질인 인듐의 수급량 부족으로 인한 문제점과 독성, 저온증착의 어려움, 스퍼터링 시 음이온 충격에 의한 막 손상으로 저항의 증가의 문제점이 있고, 또한 유기발광소자의 투명전극으로 쓰일 경우에 유기물과의 계면 부적합성, 액정디스플레이의 투명전극으로 사용될 경우에 $400^{\circ}C$정도의 놓은 온도와 수소 플라즈마 분위기에서 장시간 노출 시 열화로 인한 광학적 특성변화가 문제가 된다. 이러한 문제점을 지닌 ITO 박막을 대체할 수 있는 물질로 산화 인듐아연(lZO) 박막이 많은 각광을 받고 있다. IZO(Indium Zinc Oxide) 박막은 저온 ($100^{\circ}C$ 이상)에서 증착이 가능하고 추가적인 열처리 없이도 가시광 영역에서 90% 이상의 광 투과도와 ${\sim}10^{-4}{\Omega}cm$ 이하의 낳은 전기 비저항을 갖는 것으로 알려져 있다. 이러한 IZO박막은 성막 후 고온의 열처리 과정이 필요 없기 때문에 폴리카보네이트와 같은 유기물 기판을 사용하여 제작 가능한 유연한 평판형 표시 소자의 제작에도 적용될 수 있다. IZO(Indium Zinc Oxide) 박막은 상온 공정에서도 우수한 전기적, 광학적, 표면 특성을 나타낼 뿐만 아니라 양극재료로써 높은 일함수를 가지고 있어 고효율의 유기 발광 소자를 구현하는데 유리한 재료라 판단된다. 본 연구에서는 TCO 박막의 면 저항과 표면 거칠기가 OLED 소자의 성능에 미치는 영향을 조사하였다. R.F Magnetron Sputtering을 이용하여 투명 전도막을 성막 형성 하였으며, 기판온도와 증착과정에서 주입되는 산소, 수소의 유랑 변화가 박막의 구조적, 전기적 특성에 어떠한 영향 미치는 것인가를 자세히 규명하였다 ITO 와 IZO박막은 챔버 내 다양한 가스 분위기(Ar, $Ar+O_2$ and $Ar+H_2$) 에서 R.F Magnetron Sputtering 방법으로 증착했다. TCO박막의 구조적인 이해를 돕기 위해서 X-ray diffraction 과 FESEM으로 분석했다. 광학적 투과도와 박막의 두께는 Ultraviolet Spectrophotometer(Varian, cary-500)와 Surface profile mersurement system으로 각각 측정하였다. 면저항, charge carrier농도, 그리고 TCO박막의 이동성과 길은 전기적특성은 Four-point probe와 Hall Effect Measurement(HMS-3000)로 각각 측정한다. TCO 박막의 표면 거칠기에 따른 OLED소자의 성능분석 측면에서는 TCO 박막의 표면 거칠기 조절을 위해 photo lithography 공정을 사용하여 TCO 박막을 에칭 하였다. 미세사이즈 패턴 마스크가 사용되고 에칭의 깊이는 에칭시간에 따라 조절한다. TCO박막의 표면 형태는 FESEM과 AFM으로 관찰하고 그리고 나서 유기메탈과 음극 전극을 연속적으로 TCO 박막위에 증착한다. 투명전극으로 사용되는 IZO기판 상용화를 위해 IZO기판 위에 $\alpha$-NPB, Alq3, LiF, Al순서로 OLED소자를 제작하였다. 전류밀도와 전압 그리고 발광과 OLED소자의 전압과 같은 전기적 특성은 Spectrometer (minolta CS-1000A) 에 의하여 I-V-L분석을 했다.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.301.2-301.2
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• 2016

Metal-oxide thin-film transistors (TFTs) have gained a considerable interest in transparent electronics owing to their high optical transparency and outstanding electrical performance even in an amorphous state. Also, these metal-oxide materials can be solution-processed at a low temperature by using deep ultraviolet (DUV) induced photochemical activation allowing facile integration on flexible substrates [1]. In addition, high-dielectric constant (k) inorganic gate dielectrics are also of a great interest as a key element to lower the operating voltage and as well as the formation of coherent interface with the oxide semiconductors, which may lead to a considerable improvement in the TFT performance. In this study, we investigated the electrical properties of solution-processed high-k strontium-doped AlOx (Sr-AlOx) gate dielectrics. Using the Sr-AlOx as a gate dielectric, indium-gallium-zinc oxide (IGZO) TFTs were fabricated and their electrical properties are analyzed. We demonstrate IGZO TFTs with a 10-nm-thick Sr-AlOx gate dielectric which can be operated at a low voltage (~5 V).

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.415-415
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• 2012

ICP (RF) 열 플라즈마 분말 합성법은 초고온 열플라즈마(~10,000 K) 속으로 원료물질을 투입한 뒤, 용융, 기화 및 재합성의 과정을 거쳐 초미분(<1 ${\mu}s$)을 합성하는 방법으로 고출력 시스템의 경우 고온/고 엔탈피 열 유동을 통한 고융점 및 저융점 복합물질의 동시 기화에 의한 물질 조성이 제어된 나노 복합체의 대량 합성이 가능할 것으로 기대되고 있다. 본 연구에서는 전북대학교 고온플라즈마 응용연구센터의 60&200 kW의 고출력 ICP (RF) 열 플라즈마 시스템을 이용하여 LTO (Lithium Titanium Oxide)와 IZTO (Indium Zinc Tin Oxide), Barium Borosilicate Glass (K2O-BaO-B2O3-SiO2)의 다성분계 나노 복합체를 합성하였으며, FE-SEM, TEM, XRD, ICP-OES를 이용하여 그 특성을 분석하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.594-600
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• 2014

A threshold voltage compensation pixel circuit was developed for active-matrix organic light emitting diodes (AMOLEDs) using amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO-TFTs). Oxide TFTs are n-channel TFTs; therefore, we developed a circuit for the n-channel TFT characteristics. The proposed pixel circuit was verified and proved by circuit analysis and circuit simulations. The proposed circuit was able to compensate for the threshold voltage variations of the drive TFT in AMOLEDs. The error rate of the OLED current for a threshold voltage change of 3 V was as low as 1.5%.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.248-248
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• 2016

We have investigated the crystallinity, preferential ordering, and interfacial stability of 1,4,5,8,9,11-hexaazatriphenylene-hexanitrile (HATCN) thin film interconnected with organic/inorganic multilayer. At the region close to the organic-organic interface, HATCN formed low crystalline order with substantial amorphous phase. As film growth continued, HATCN stacked with high crystalline phase. After a sputtering deposition of the indium zinc oxide (IZO) layer on top of HATCN/organic layer, the volume fraction of preferentially ordered HATCN crystals increased without any structural deterioration. In addition, the HATCN surface was kept quite stable by preserving the sharp interface between HATCN and sputtering deposited IZO layers.