• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.76.1-76.1
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• 2013

Atomic Layer Deposition (ALD) has remarkably developed in semiconductor and nano-structure applications since early 1990. Now, the advantages of ALD process are well-known as controlling atomic-level-thickness, manipulating atomic-level-composition control, and depositing impurity-free films uniformly. These unique properties may accelerate ALD related industries and applications in various functional thin film markets. On the other hand, one of big markets, Display industry, just starts to look at the potential to adopt ALD functional films in emerging display applications, such as transparent and flexible displays. Unlike conventional ALD process strategies (good quality films and stable precursors at high deposition processes), recently major display industries have suggested the following requirements: large area equipment, reasonable throughput, low temperature process, and cost-effective functional precursors. In this talk, it will be mentioned some demands of display industries for applying ALD processes and/or functional films, in terms of emerging display technologies. In fact, the AMOLED (active matrix organic light emitting diode) Television markets are just starting at early 2013. There are a few possibilities and needs to be developing for AMOLED, Flexible and transparent Display markets. Moreover, some basic results will be shown to specify ALD display applications, including transparent conduction oxide, oxide semiconductor, passivation and barrier films.

• 센서학회지
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• 제5권1호
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• pp.57-62
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• 1996

하이퍼어브��트 접합구조의 $p^{+}n$ 다이오드의 누설전류를 감소시키기 위하여 $3000{\AA}$ 두께의 다결정 실리콘을 다이오드의 상층부에 증착하여 $900^{\circ}C$, $N_{2}$ 분위기에서 30분간 어닐링하였다. 다결정 실리콘 유무 및 n 확산층의 불순물 종류에 따른 다이오드의 누설전류 특성을 조사하였으며, 다결정 실리콘을 사용하였을 때 누설전류의 크기를 약 $\frac{1}{1000}$배 감소시킬 수 있었다. TEM 분석을 통하여 활성화 영역에 존재하였던 많은 전위 루프들이 그 표면 위에 다결정 실리콘을 사용함으로써 제거됨을 알 수 있었다. 그리고 이 결함들은 As의 이온주입에 의한 n 확산층에 의해 유발됨을 알 수 있었다.

• Journal of Magnetics
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• 제12권3호
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• pp.118-123
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• 2007

We have studied the effect of Au-Cu back layer system ${\sim}10{\AA}$ thick on the properties of a spin valve. The back layers were Cu, Au, co-sputtered $Cu_xAu_{1-x}$, laminated $[Au/Cu]_n$. and bi-layer [Au/Cu]. When Au was added to the Cu, the resistance of the spin valve abruptly increased most likely due to impurity scattering. The GMR values were not increased significantly for all the structures. In the case of co-sputtered $Cu_xAu_{1-x}$, the changes in the resistance, ${\Delta}R$, was increased at a composition of ${\sim}Au_{0.5}Cu_{0.5}$. This increase in ${\Delta}R$ is due to increase in the resistance and not from the enhanced spin-dependent scattering. The structural analyses showed that the orthorhombic $Au_{0.5}Cu_{0.5}$ was formed in the back layer instead of the face-centered tetragonal $Au_{0.5}Cu_{0.5}$ as we expected. Thermal annealing over $400^{\circ}C$ may be required to have face-centered tetragonal in the $10{\AA}$ thick ultra-thin film. In the case of a laminated or bi-layered back layer, the properties of the spin valve were improved, which may be attributed to the increase in the mean free path of conduction electrons.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2007년도 춘계학술대회
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• pp.193-198
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• 2007

The NiSi is very promising candidate for the metallization in 60nm CMOS process such as FUSI(fully silicided) gate and source/drain contact because it exhibits non-size dependent resistance, low silicon consumption and mid-gap workfunction. Ni film was first deposited by using ALD (atomic layer deposition) technique with Bis-Ni precursor and $H_2$ reactant gas at $220^{\circ}C$ with deposition rate of $1.25{\AA}/cycle$. The as-deposited Ni film exhibited a sheet resistance of $5{\Omega}/{\square}$. RTP (repaid thermal process) was then performed by varying temperature from $400^{\circ}C$ to $900^{\circ}C$ in $N_2$ ambient for the formation of NiSi. The process window temperature for the formation of low-resistance NiSi was estimated from $600^{\circ}C$ to $800^{\circ}C$ and from $700^{\circ}C$ to $800^{\circ}C$ with and without Ti capping layer. The respective sheet resistance of the films was changed to $2.5{\Omega}/{\square}$ and $3{\Omega}/{\square}$ after silicidation. This is because Ti capping layer increases reaction between Ni and Si and suppresses the oxidation and impurity incorporation into Ni film during silicidation process. The NiSi films were treated by additional thermal stress in a resistively heated furnace for test of thermal stability, showing that the film heat-treated at $800^{\circ}C$ was more stable than that at $700^{\circ}C$ due to better crystallinity.

• 한국전기전자재료학회논문지
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• 제18권8호
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• pp.720-723
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• 2005

We studied the quantitativity of the image sticking which is occured by the resicual DC in the fringe-electric field switching (FFS) mode. Actually, in the FFS mode driven by the strong fringe electric field, the asymmetric residual DC was formed in the bottom substrate. It made the impurity ion stick to the alignment layer such as polyimde layer. Thus, the differnece of the luminance existes after the stress check pattern is applied to the panel so that we can see the image sticking. This image sticking decreases as the residual DC value between specific patterns decreases. Therefore, it is necessary to control the residual DC for the FFS mode with the high image quality. It is possible to eliminate the image stiking when the extra pixel voltage is applied through the circuit tunning for reducing the difference of residual DC accroding to the panel position.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.973-976
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• 2004

The results of numerous studies in III-V semiconductors show that sulfur treatment improves the electrical parameters of III-V compound devices. In this article, we examine the effects of sulfidation of HgCdTe surface on the interfacial characteristics of metal-ZnS-HgCdTe structures. Different from sulfidation in III-V material, S can not be act as an impurity because II-S compounds (ZnS, CdS) generally used as passivant for HgCdTe. Our studies of sulfur-treatment on HgCdTe surface show that sulfur agent forms the S- S, II-S bonds at the surface layer. These bonds are very effective to improve the electrical properties of ZnS layer on HgCdTe by reducing the possibility of native oxides formation. After the sulfidation process, MIS capacitors of HgCdTe show great improvement in electrical properties, such as low density of fixed charge and reduced hystereisis width.

• 한국표면공학회지
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• 제53권4호
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• pp.169-181
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• 2020

The ferroelectricity in emerging fluorite-structure oxides such as HfO₂ and ZrO₂ has attracted increasing interest since 2011. Different from conventional ferroelectrics, the fluorite-structure ferroelectrics could be reliably scaled down below 10 nm thickness with established atomic layer deposition technique. However, defects such as carbon, hydrogen, and nitrogen atoms in fluorite-structure ferroelectrics are reported to strongly affect the nanoscale polymorphism and resulting ferroelectricity. The characteristic nanoscale polymorphism and resulting ferroelectricity in fluorite-structure oxides have been reported to be influenced by defect concentration. Moreover, the conduction of charge carriers through fluorite-structure ferroelectrics is affected by impurities. In this review, the origin and effects of various kinds of defects are reviewed based on existing literature.

• 한국산학기술학회논문지
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• 제7권1호
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• pp.7-11
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• 2006

SCM(Scanning Capacitance Method)를 이용하여, SCM 팁의 전계에 의해 형성되는 실리콘내의 공핍영역를 분석할 수 있는 방법론을 구축하였다. 2차원 유한요소법을 이용하여 SCM으로 측정된 결과로부터 불순물의 농도를 도출할 수 있었다. 이 방법은 캐패시턴스, 공핍화된 체적 및 바이어스에 따른 캐패시턴스의 변화율로부터 구해진다. 본 연구에서는 팁의 크기, 산화층 두께 및 가해지는 바이어스에 따른 공핍 전하와 전위에 따른 영향등을 분석하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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• pp.97-100
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• 1992

The Degradation mechanism of the ZnO-varistor fabricated with the content of a 3-Composition seed grain is discussed using the method of Thermally Stimulated Current (TSC). The spectra of TSC is measured in the temperature range of -130～270$^{\circ}C$ with a various forming electric fields E$\sub$f/, temperature T$\sub$f/ time tf, and a various rising rate of temperature. It is observed that there are appeared the peaks of ${\alpha}$, ${\alpha}$$_2$, ${\beta}$ and ${\gamma}$from high temperature in a TSC spectrum. It seems that ${\alpha}$$_1$ peak is due to thermal depolarization of donor ions forming the space charge in the depletion layer, and ${\alpha}$$_2$peak is due to the detrapping of trapped electrons in deep trap level of intergranular layer, and ${\beta}$ peak is due to the thermal exciting of carrier existing in the donor level of grain itself, and ${\gamma}$ peak is due to the thermal exciting of trapped carrier in all shallow trap site randomly distributed in the inner of sample and/or a intrinsic impurity existing in it.

• 한국안전학회지
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• 제18권3호
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• pp.69-74
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• 2003

To investigate the partial discharge and electric field distribution in cable joint parts, we measured the partial discharge and electric field in specimen. The specimens which cross-linked polyethylene(XLPE) and ethylene propylene diene ethylene(EPDM) are used to insulating material for underground cable md cable jointing parts. The polymers are used to insulating material in switchgear which is a kind of transformer equipment and in ultra-high voltage cable. Its using is increasing gradually, the electrical insulation properties are not only excellent but also mechanical property is excellent. And because it is possible to be made void of several type in insulator while it is produced, which the electrical field distribution is changed by void, it has a critical influence to insulator performance. The underground cable is connecting by the jointing material, insulating breakdown and the electric ageing which are caused by several mixing impurity and the damage of cable insulator layer, which reduced the life of cable while intermediate joint kit is connected. Therefore, the computer simulation is used to estimating insulator performance, XLPE is used to the insulating material of ultra-high voltage cable and EPDM is used to insulator layer in joint material kit, and which are produced as specimen. And it is analyzed the electric field concentrating distribution and partial discharge by modeling of computer simulation in void and cable joint kit.