• 한국가시화정보학회지
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• 제18권3호
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• pp.103-108
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• 2020

RBC (red blood cell) deformability is one of factors inducing blood shear thinning effect. Reduction of RBC deformability increases blood viscosity in high shear region. In this study, 3D printed chip with proper distribution of wall shear rate (WSR) was proposed to measure RBC deformability of blood samples. To fabricate 3D printed chip, the design of 3D printed chip determined through numerical simulation was modified based on the resolution of the 3D printer. For the estimation of pressure drop in the 3D printed chip, two bypass outlets with low and high WSR are exposed to atmospheric pressure through the needles. By positioning the outlet of needles in the gravity direction, the formation of droplets at bypass outlets can be captured by smartphone. Through image processing and fast Fourier transform (FFT) analysis, the frequency of droplet formation was analyzed. Since the frequency of droplet formation is related with the pressure at bypass, high pressure drop caused by reduction of RBC deformability can be estimated by monitoring the formation of blood droplets using the smartphone.

• 한국정밀공학회지
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• 제33권11호
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• pp.885-891
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• 2016

3D images are generally manufactured by complex production processes. We suggested a simple method to make 3D images based on a mechanical machining technology in this study. We designed a tetrahedron consisted of many arcs having the depth of $100{\mu}m$ and the pitch of $500{\mu}m$, and machined them on an aluminum plate using end-milling under several conditions of feed-rate and depth of cut. The area of undeformed chip including depth of cut and feed-rate can predict quality of the machined arcs more precisely than the undeformed chip thickness including only feed rate. Moreover, a diamond tool can improve the quality than a CBN tool when many arcs are machined. Based on the analysis, the designed tetrahedron having many arcs was machined with no burr, and it showed different images when observed from the left and right directions. Therefore, it is verified that a 3D image can be designed and manufactured on a metal plate by end-milling under optimized machining conditions.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2011년도 제42회 하계학술대회
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• pp.1680-1681
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• 2011

In this paper, particle counting system using a CMOS image sensor is demonstrated. The system utilizes a linear photodetector array as a detection element. Therefore, the particles are detected by large detection region, in contrast to a single detector in conventional particle counting devices, while maintaining the sensitivity. The advantage of proposed system is that particles are detected in a relatively large area without using the particle focusing method. Also, proposed system can be easily integrated with a microfluidic chip by attaching the device underneath the bottom plate of the microfluidic chip. Detection of polystyrene microbeads has been tested at a flow rate of 4.89mm/s. For 21 measurements, proposed system showed an average count error of 7.29% and a standard deviation of 4.74%. Potentially, the proposed system can detect even smaller particles simply by utilizing a higher resolution CMOS image sensor.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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• pp.82-85
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• 2004

This paper proposes an advanced circuit for the capacitive type fingerprint sensor signal processing and an effective isolation structure for minimizing an electrostatic discharge(ESD) influence and for removing a signal coupling noise of each sensor pixel. The proposed detection circuit increases the voltage difference between a ridge and valley about $80\%$ more than old circuit. The test chip is composed of $160\;\times\;192$ array sensing cells $(9,913\times11,666\;um^2).$ The sensor plate area is $58\;\times\;58\;um^2$ and the pitch is 60um. The image resolution is 423 dpi. The chip was fabricated on a 0.35um standard CMOS process. It successfully captured a high-quality fingerprint image and performed the registration and identification processing. The sensing and authentication time is 1 sec(.) with the average power consumption of 10 mW at 3.0V. The reveal ESD tolerance is obtained at the value of 4.5 kV.

• 정보처리학회논문지A
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• 제13A권3호
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• pp.185-190
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• 2006

JPEG 2000 알고리즘은 기존의 정지영상 압축 PEG 알고리즘에서 발생하는 블록화 현상의 문제점을 해결하였지만, 압축 율과 이미지 복원율을 높이기 위한 과정이 복잡해 졌고 부동소수점의 연산 시간이 많이 걸리는 단점을 가지고 있다. 이 단점을 보완하기 위하여 본 논문은 JPEG 2000 알고리즘의 부동소수점 연산이 많은 필터 부분을 하드웨어로 구현하였다. 이 DWT Filter[1] 칩은 Daubechies 9/7 filter[6]을 기반으로 설계되었고 성능과 크기(반도체 숫자)를 최적화하기 위해서 3 단계 파이프라인 시스템으로 구성되었다. 본 논문에서 설계한 Filter는 소프트웨어로 구현된 것보다 부동 소수점의 연산에서 7배 정도 성능이 향상되었다.

• 센서학회지
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• 제27권6호
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• pp.357-361
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• 2018

This paper presents an averaging current adjustment technique for reducing the pixel resistance variation in a bolometer-type uncooled infrared image sensor. Each unit pixel was composed of an active pixel, a reference pixel for the averaging current adjustment technique, and a calibration circuit. The reference pixel was integrated with a polysilicon resistor using a standard complementary metal-oxide-semiconductor (CMOS) process, and the active pixel was applied from outside of the chip. The averaging current adjustment technique was designed by using the reference pixel. The entire circuit was implemented on a chip that was composed of a reference pixel array for the averaging current adjustment technique, a calibration circuit, and readout circuits. The proposed reference pixel array for the averaging current adjustment technique, calibration circuit, and readout circuit were designed and fabricated by a $0.35-{\mu}m$ standard CMOS process.

• 한국GIS학회:학술대회논문집
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• 한국GIS학회 2003년도 공동 춘계학술대회 논문집
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• pp.349-353
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• 2003

최근 관심이 증대되고 있는 국토모니터링과 관련하여 기존의 SPOT, IRS, KOMPSAT, LANDSAT 등의 중ㆍ저해상도 위성영상과 IKONOS 등의 고해상도 위성영상을 이용하여 국토의 변화를 탐지하고자 하는 시도가 활발히 진행되고 있다. 이 때 영상의 기하보정은 필수적인 과정이며 영상의 기하보정시 기준점을 취득하는 과정에 많은 시간과 작업비용이 소요된다. 현재 기준점 취득은 수치지도 등을 통해 기존의 지상기준점을 이용하는 방법과 GPS를 이용한 현지 측량방법이 활용되고 있는데 동일지역에 대해 매번 사업 때마다 수행되고 있는 실정이다. 따라서 이러한 과정을 보다 효율적으로 수행하기 위한 하나의 방안으로 본 연구에서는 image chip을 이용하여 GCP를 취득하고 이를 데이터베이스로 구축하여 기존의 작업을 자동화, 체계화하고자 하였다. 이를 통하여 중복측량 방지와 데이터의 균질성을 기할 수 있었다. Image Chip의 영상 정합을 위해서는 상관계수법과 최소제곱정합법을 이용하여 부영상소 단위까지 정합결과를 얻을 수 있었으며 위성의 header 정보로부터의 영상의 표정각과 입사각에 대한 정보를 이용하여 축척과 회전요소를 고려함으로써 영상 정합시 보다 정확한 기준점 정보를 취득할 수 있었다. 또한, 이종 센서간 영상정합 가능성에 대해서 연구한 결과 KOMPSAT과 SPOT간에는 신뢰할 만한 수준의 정합 결과를 얻을 수 있었으나 고해상도 영상의 경우에는 항공사진과 IKONOS의 영상 정합시 센서의 방사학적 특성의 차이로 신뢰할 안한 결과를 얻을 수 없었다. 영상 정합시 정확도에 영향을 미치는 인자들에 관한 실험 결과 센서의 파장, 계절, Chip 영상의 크기 등이 큰 영향을 미쳤으며 영상정합을 위해 영상 GCP를 데이터베이스에서 검색할 때 이에 대한 고려가 우선적으로 이루어져야 할 것으로 사료된다.n of hub-and-spoke system, integration of logistics bases, introduction of (automatic) parking building, diversification of transportation mode, and etc. At the same time, we constructed three practically executable scenarios based on those ideas. The first is "Center Hub" scenario, the second is "Metropolitan Hub" scenario. The third and last scenario is "Regional Consolidation of Warehouses (distribution centers)".f worldly desire' and 'cordiality' that one could be deserved his diligency becoming a part of the harmonious idealistic living place. Fourthly, on the character of story teller. Originally he is a incomer of "Gang-Ho" from real world. so that reason, he is showing dualism not to deny the loyalty oath to his king, while he intends to satisfy with the life in "Gang- Ho" separating himself from real world. As a gentry, at that time, the loyalty oath is inevitable one and that is found from wr

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(4)
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• pp.199-202
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• 2001

A current TV-OUT format is quite different from that of HDTY or PC monitor in encoding techniques. In other words, a conventional analog TV uses interlaced display while HDTV or PC monitor uses Non-interlaced / Progressive-scanned display. In order to encode image signals coming from devices that takes interlaced display format for progressive scanned display, a hardware logic in which scanning and interpolation algorithms are implemented is necessary. The ELA (Edge-Based Line Average) algorithm have been widely used because it provided good characteristics. In this study, the ADI(Adaptive De-interlacing Interpolation) algorithm using to improve the algorithm which shows low quality in vertical edge detections and low efficiency of horizontal edge lines. With the De-interlacing ASIC chip that converts the interlaced Digital YUV to De-interlaced Digital RGB is designed. The VHDL is used for chip design.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1996년도 한국자동제어학술회의논문집(국내학술편); 포항공과대학교, 포항; 24-26 Oct. 1996
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• pp.1316-1319
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• 1996

This paper proposes the algorithm for the correction of a position and orientation of small object such as chip in the precise construction process. In the past, it is general to correct position and orientation of object using human sight and simple vision sensors. But recently, researches using image processing devices have been studied to improve the corrective precision of a position and orientation of object. In this piper, maximum-axis moment and p-theta algorithm are used to correct the position and orientation. Algorithm of maximum-axis moment is widely applied to hetero-object except being applied to a perfect rectangle. This is reason that moments of the X and Y-axis are equal. Therefore, being the shape of a perfect rectangle, the object is applied to other algorithm. In the light of time problem, real-time control is as important as correction of object. To solve it, we use the DSP(Digital Signal Processing) which is far more fast than PC.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.847-850
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• 2003

An Eye Ball Sensor (EBS) is a system that locates the point where the user gazes on. The conventional EBS using a CCD camera needs many peripherals, software computation causing high cost and power consumption. This paper proposes a compact EBS using smart CMOS Image Sensor (CIS) pixels. The proposed single chip EBS does not need any peripheral and operates at higher speed and lower cost than the conventional EBS. The test chip was designed and fabricated for 32$\times$32 smart CIS pixel array with a 0.35 um CMOS process occupying 5.3$\textrm{mm}^2$ silicon area.