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http://dx.doi.org/10.3745/KIPSTA.2006.13A.3.185

A SoC design and implementation for JPEG 2000 Floating Point Filter  

Chang Jong-Kwon (울산대학교 컴퓨터 정보통신공학부)
Publication Information
The KIPS Transactions:PartA / v.13A, no.3, 2006 , pp. 185-190 More about this Journal
Abstract
JPEG 2000 is used as an alternative to solve the blocking artifact problem with the existing still image compression JPEG algorithm. However, it has shortcomings such as longer floating point computation time and more complexity in the procedure of enhancing the image compression rate and decompression rate. To compensate for these we implemented with hardware the JPEG 2000 algorithm's filter part which requires a lot of floating point computation. This DWT Filter[1] chip is designed on the basis of Daubechies 9/7 filter[6] and is composed of 3-stage pipeline system to optimize the performance and chip size. Our implemented Filter was 7 times faster than software based Filter in the floating point computation.
Keywords
JPEG; Still Image Compression; Floating Point; Compression Rate; Decompression Rate;
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