• Smart Structures and Systems
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• v.19 no.4
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• pp.341-350
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• 2017

Based on the super elastic properties of the shape memory alloy (SMA) and the inverse piezoelectric effect of piezoelectric (PZT) ceramics, a kind of hybrid semi-active control device was designed and made, its mechanical properties test was done under different frequency and different voltage. The local search ability of genetic algorithm is poor, which would fall into the defect of prematurity easily. A kind of adaptive immune memory cloning algorithm(AIMCA) was proposed based on the simulation of clone selection and immune memory process. It can adjust the mutation probability and clone scale adaptively through the way of introducing memory cell and antibody incentive degrees. And performance indicator based on the modal controllable degree was taken as antigen-antibody affinity function, the optimization analysis of damper layout in a space truss structure was done. The structural seismic response was analyzed by applying the neural network prediction model and T-S fuzzy logic. Results show that SMA and PZT friction composite damper has a good energy dissipation capacity and stable performance, the bigger voltage, the better energy dissipation ability. Compared with genetic algorithm, the adaptive immune memory clone algorithm overcomes the problem of prematurity effectively. Besides, it has stronger global searching ability, better population diversity and faster convergence speed, makes the damper has a better arrangement position in structural dampers optimization leading to the better damping effect.

• International Journal of Internet, Broadcasting and Communication
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• v.12 no.1
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• pp.90-94
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• 2020

Artificial intelligence (AI) is software that learns large amounts of data and provides the desired results for certain patterns. In other words, learning a large amount of data is very important, and the role of memory in terms of computing systems is important. Massive data means wider bandwidth, and the design of the memory system that can provide it becomes even more important. Providing wide bandwidth in AI systems is also related to power consumption. AlphaGo, for example, consumes 170 kW of power using 1202 CPUs and 176 GPUs. Since more than 50% of the consumption of memory is usually used by system chips, a lot of investment is being made in memory technology for AI chips. MRAM, PRAM, ReRAM and Hybrid RAM are mainly studied. This study presents various memory technologies that are being studied in artificial intelligence chip design. Especially, MRAM and PRAM are commerciallized for the next generation memory. They have two significant advantages that are ultra low power consumption and nearly zero leakage power. This paper describes a comparative analysis of the four representative new memory technologies.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.39 no.2
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• pp.191-197
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• 2015

The message passing interface (MPI) and hybrid programming models for the parallel computation of a pressure equation were compared in a distributed memory system. Both models were based on domain decomposition, and two numbers of the sub-domain were selected by considering the efficiency of the hybrid model. The parallel performances for various problem sizes were measured using up to 96 threads. It was found that in addition to the cache-memory size, the overhead of the MPI communication/OpenMP directives affected the parallel performance. For small problems, the parallel performance was low because the percentage of the overhead of the MPI communication/OpenMP directives increased as the number of threads increased, and MPI was better than the hybrid model because it had a smaller communication overhead. For large problems, the parallel performance was high because, in addition to the cache effect, the percentage of the communication overhead was relatively low compared to that for small problems, and the hybrid model was better than MPI because the communication overhead of MPI was more dominant than that of the OpenMP directives in the hybrid model.

• Earthquakes and Structures
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• v.27 no.1
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• pp.57-67
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• 2024

To assess the seismic performance of Plate-Shell Integrated Concrete Liquid-Storage Structure (PSICLSS), a scaled test model was constructed. This model incorporated a hybrid isolation system, which combined shape memory alloy (SMA), lead-cored rubber isolation bearing (LRB) and sliding isolation bearing (SB). By conducting shaking table test, the dynamic responses of both non-isolated and hybrid-isolated PSICLSS were analyzed. The results show that the hybrid isolation system can effectively reduce the acceleration and displacement responses of the structure. However, it also results in an increase in local hydrodynamic pressure and liquid sloshing height. Under extreme earthquake action, the displacement of isolation layer is small. When vertical ground motion is taken into account, the shock absorption rate of horizontal acceleration decreases. The peak hydrodynamic pressure increases significantly, and the peak hydrodynamic pressure position also changes. The maximum displacement of isolation layer increases, the residual displacement decreases.

• IEMEK Journal of Embedded Systems and Applications
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• v.11 no.2
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• pp.67-78
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• 2016

The emerging Spin-Transfer Torque RAM (STT-RAM) is a promising component that can be used to improve the efficiency as a result of its high storage density and low leakage power. However, the state-of-the-art STT-RAM is not ready to replace SRAM technology due to the negative effect of its write operations. The write operations require longer latency and more power than the same operations in SRAM. Therefore, a hybrid cache with SRAM and STT-RAM technologies is proposed to obtain the benefits of STT-RAM while minimizing its negative effects by using SRAM. To efficiently use of the hybrid cache, it is important to place write intensive data onto the cache. Such data should be placed on SRAM to minimize the negative effect. Thus, we propose a technique that optimizes placement of data in main memory. It drives the proper combination of advantages and disadvantages for SRAM and STT-RAM in the hybrid cache. As a result of the proposed technique, write intensive data are loaded to SRAM and read intensive data are loaded to STT-RAM. In addition, our technique also optimizes temporal locality to minimize conflict misses. Therefore, it improves performance and energy consumption of the hybrid cache architecture in a certain range.

• Journal of KIISE:Software and Applications
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• v.31 no.3
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• pp.369-378
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• 2004

In partially free word order languages like Korean and Japanese, the rule-based method is effective for text chunking, and shows the performance as high as machine learning methods even with a few rules due to the well-developed overt Postpositions and endings. However, it has no ability to handle the exceptions of the rules. Exception handling is an important work in natural language processing, and the exceptions can be efficiently processed in memory-based teaming. In this paper, we propose a hybrid of rule-based method and memory-based learning for Korean text chunking. The proposed method is primarily based on the rules, and then the chunks estimated by the rules are verified by memory-based classifier. An evaluation of the proposed method on Korean STEP 2000 corpus yields the improvement in F-score over the rules or various machine teaming methods alone. The final F-score is 94.19, while those of the rules and SVMs, the best machine learning method for this task, are just 91.87 and 92.54 respectively.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.1
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• pp.135-140
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• 2020

Recently, due to the rapid diffusion of intelligent systems and IoT technologies, power saving techniques in real-time embedded systems has become important. In this paper, we propose P-GA (Parallel Genetic Algorithm), a scheduling algorithm aims at reducing the power consumption of real-time systems in multi-core hybrid memory environments. P-GA improves the Proportional-Fairness (PF) algorithm devised for multi-core environments by combining the dynamic voltage/frequency scaling of the processor with the nonvolatile memory technologies. Specifically, P-GA applies genetic algorithms for optimizing the voltage and frequency modes of processors and the memory types, thereby minimizing the power consumptions of the task set. Simulation experiments show that the power consumption of P-GA is reduced by 2.85 times compared to the conventional schemes.

• Composites Research
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• v.17 no.4
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• pp.18-24
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• 2004

In this paper, active shape control of composite structures actuated by shape memory alloy (SMA) wires is presented. The thermo-mechanical behaviors of SMA wires were experimentally measured. Hybrid composite structures were established by attaching SMA actuators on the surfaces of graphite/epoxy composite beams using bolt-joint connectors. SMA actuators were activated by phase transformation, which induced by temperature rising over austenite finish temperature. In this paper, electrical resistive heating was applied to the hybrid composite structures to activate the SMA actuators. For (aster and more accurate shape/deflection control of the hybrid composite structure, PID feedback controller was designed from numerical simulations and experimentally applied to the SMA actuators.

• Journal of KIISE
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• v.42 no.4
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• pp.434-441
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• 2015

Next generation memory technologies, which we denote as 'new memory', have both non-volatile and byte addressable properties. These characteristics are expected to bring changes to the conventional computer system structure. In this paper, we propose a fast boot technique for hybrid main memory architectures that have both new memory and DRAM. The key technique used for fast booting is write-tracking. Write-tracking is used to detect and manage modified data detection and involves setting the kernel region to read-only. This setting is used to trigger intentional faults upon modification requests. As the fault handler can detect the faulting address, write-tracking makes use of the address to manage the modified data. In particular, in our case, we make use of the MMU (Memory Management Unit) translation table. When a write occurs to the boot completed state, write-tracking preserves the original state of the modified address of the kernel region to a particular location, and execution continues. Upon booting, the fast booting process restores the preserved data to the original kernel region allowing rapid system boot-up. We develop the fast booting technique in an actual embedded board equipped with new memory. The boot time is reduced to less than half a second compared to around 15 seconds that is required for the original system.

• Journal of Power Electronics
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• v.19 no.1
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• pp.158-167
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• 2019

This research comparatively studies three kinds of flux regulation methods, namely, stored capacitor discharge pulse (SCDP), constant current source pulse (CCSP), and quantitative flux regulation pulse (QFRP), which are used for hybrid permanent magnet (PM) axial field flux-switching memory machines (HPM-AFFSMMs). Through an analysis of the operation principle and the series hybrid PM flux regulation mechanism of the objective machine, the circuit topologies and flux regulation process of these flux regulation methods are addressed in detail. On the basis of a simulation, the flux regulation characteristics of the researched machine during the magnetization and demagnetization processes are comparatively evaluated. Then, machine performance, including back EMF, direct and quadrature axis inductances, and magnetization and demagnetization characteristics, is quantitatively investigated. Results show that the QFRP enables the HPM-AFFSMM to achieve a less harmonic component of back EMF by approximately 7.28% and 7.97% at the magnetization and demagnetization states, respectively, and a more complete magnetization process than the SCDP and CCSP.