• Title/Summary/Keyword: hybrid encoder

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DP-LinkNet: A convolutional network for historical document image binarization

  • Xiong, Wei;Jia, Xiuhong;Yang, Dichun;Ai, Meihui;Li, Lirong;Wang, Song
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.15 no.5
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    • pp.1778-1797
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    • 2021
  • Document image binarization is an important pre-processing step in document analysis and archiving. The state-of-the-art models for document image binarization are variants of encoder-decoder architectures, such as FCN (fully convolutional network) and U-Net. Despite their success, they still suffer from three limitations: (1) reduced feature map resolution due to consecutive strided pooling or convolutions, (2) multiple scales of target objects, and (3) reduced localization accuracy due to the built-in invariance of deep convolutional neural networks (DCNNs). To overcome these three challenges, we propose an improved semantic segmentation model, referred to as DP-LinkNet, which adopts the D-LinkNet architecture as its backbone, with the proposed hybrid dilated convolution (HDC) and spatial pyramid pooling (SPP) modules between the encoder and the decoder. Extensive experiments are conducted on recent document image binarization competition (DIBCO) and handwritten document image binarization competition (H-DIBCO) benchmark datasets. Results show that our proposed DP-LinkNet outperforms other state-of-the-art techniques by a large margin. Our implementation and the pre-trained models are available at https://github.com/beargolden/DP-LinkNet.

CRC-Turbo Concatenated Code for Hybrid ARQ System

  • Kim, Woo-Tae;Kim, Jeong-Goo;Joo, Eon-Kyeong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.3C
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    • pp.195-204
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    • 2007
  • The cyclic redundancy check(CRC) code used to decide retransmission request in hybrid automatic repeat request(HRAQ) system can also be used to stop iterative decoding of turbo code if it is used as an error correcting code(ECC) of HARQ system. Thus a scheme to use CRC code for both iteration stop and repeat request in the HARQ system with turbo code based on the standard of cdma 2000 system is proposed in this paper. At first, the optimum CRC code which has the minimum length without performance degradation due to undetected errors is found. And the most appropriate turbo encoder structure is also suggested. As results, it is shown that at least 32-bit CRC code should be used and a turbo code with 3 constituent encoders is considered to be the most appropriate one.

A Study on precision encoder design using diffraction grating (광학식 엔코더의 회절격자를 이용한 고정도 엔코더 개발)

  • Hong J. P.;Son J. K.;Won T. H.;Kwon S. J.;Hong S. I.;Kim J. D.
    • Proceedings of the KIPE Conference
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    • 2004.07b
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    • pp.878-882
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    • 2004
  • Position controls are very important in semiconductor manufacturing devices, machine tools precision measuring instruments, etc. In this paper, a novel encoder of digital and analog hybrid type is proposed. It is shown that from this experiment a high-resolution angle measurement device can be designed by a low cost incremental encoder.

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An SNR Scalable Video Coding using Linearly Combined Motion Vectors

  • Ryu, Chang-Hoon;Byoungjun Han;Park, Kwang-Pyo;Yoon, Eung-Sik;Lee, Keun-Young
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.50-53
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    • 2002
  • There are increasing needs to deliver the multimedia streaming over heterogeneous networks. When considering network environments and equipment accessed by user, delivery of video streaming must be scalable. There are many kinds of scalable video coding: spatial, temporal, SNR, and hybrid. The SNR scalable and spatial resolution, but different SNR quality with respect to layers. The 1-layer SNR scalable encoder produces SNR scalable video streams with ease. But, there is drift problem. Modified 1-layer approach does not have this problem but coding inefficiency, and is not MPEG-compliant. The present MPEG-compliant 2-layer encoder comes out to reduce coding rate. But it still use only base layer to encode whole layer. In this paper, we propose adaptive MPEG-compliant 2-layer encoder. Using linear combination algorithm, encoder use 1 motion vector to encode the sequences efficiently. By dong this, we can achieve the coding efficiency of SNR scalable coding.

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New Hybrid Approach of CNN and RNN based on Encoder and Decoder (인코더와 디코더에 기반한 합성곱 신경망과 순환 신경망의 새로운 하이브리드 접근법)

  • Jongwoo Woo;Gunwoo Kim;Keunho Choi
    • Information Systems Review
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    • v.25 no.1
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    • pp.129-143
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    • 2023
  • In the era of big data, the field of artificial intelligence is showing remarkable growth, and in particular, the image classification learning methods by deep learning are becoming an important area. Various studies have been actively conducted to further improve the performance of CNNs, which have been widely used in image classification, among which a representative method is the Convolutional Recurrent Neural Network (CRNN) algorithm. The CRNN algorithm consists of a combination of CNN for image classification and RNNs for recognizing time series elements. However, since the inputs used in the RNN area of CRNN are the flatten values extracted by applying the convolution and pooling technique to the image, pixel values in the same phase in the image appear in different order. And this makes it difficult to properly learn the sequence of arrangements in the image intended by the RNN. Therefore, this study aims to improve image classification performance by proposing a novel hybrid method of CNN and RNN applying the concepts of encoder and decoder. In this study, the effectiveness of the new hybrid method was verified through various experiments. This study has academic implications in that it broadens the applicability of encoder and decoder concepts, and the proposed method has advantages in terms of model learning time and infrastructure construction costs as it does not significantly increase complexity compared to conventional hybrid methods. In addition, this study has practical implications in that it presents the possibility of improving the quality of services provided in various fields that require accurate image classification.

New Multiplier for a Double-Base Number System Linked to a Flash ADC

  • Nguyen, Minh-Son;Kim, In-Soo;Choi, Kyu-Sun;Lim, Jae-Hyun;Choi, Won-Ho;Kim, Jong-Soo
    • ETRI Journal
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    • v.34 no.2
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    • pp.256-259
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    • 2012
  • The double-base number system has been used in digital signal processing systems for over a decade because of its fast inner product operation and low hardware complexity. This letter proposes an innovative multiplier architecture using hybrid operands. The multiplier can easily be linked to flash analog-to-digital converters or digital systems through a double-base number encoder (DBNE) for realtime signal processing. The design of the DBNE and the multiplier enable faster digital signal processing and require less hardware resources compared to the binary processing method.

Feasibility Verification of a Non-Contact Vibration Sensor for Rotating Shafts Endowed with Rotational-Encoder Capability (회전속도 측정기능을 갖춘 비접촉 축 진동센서의 가능성 검증)

  • Lee, Ho-Cheol;Kim, Myong-Ho;Park, Jung-Yang
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.30 no.12 s.255
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    • pp.1596-1602
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    • 2006
  • In this paper, a hybrid sensor is proposed that has two capabilities: the first is to sense longitudinal or flexural transient vibration signals selectively which are transmitted along the target shaft, and the second to measure the rotating speed of the shaft. All measurements are made in a non-contact manner since this sensor uses magnetostriction as its measuring principle. The signal selection between two vibration modes requires only electrical switching operations and the switching between these two sensing capabilities-vibrations and rotational speed-are accomplished by a very simple mechanical operation. To verify the capabilities of the proposed sensor, a prototype sensor is fabricated and the experiments are made. The results show this sensor can embody two sensing capabilities in one sensor configuration.

Accuracy Improvement of a 5-axis Hybrid Machine Tool (5축 혼합형 공작기계의 정밀도 향상 연구)

  • Kim, Han Sung
    • Journal of the Korean Society of Industry Convergence
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    • v.17 no.3
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    • pp.84-92
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    • 2014
  • In this paper, a novel 5-axis hybrid-kinematic machine tool is introduced and the research results on accuracy improvement of the prototype machine tool are presented. The 5-axis hybrid machine tool is made up of a 3-DOF parallel manipulator and a 2-DOF serial one connected in series. The machine tool maintains high ratio of stiffness to mass due to the parallel structure and high orientation capability due to the serial-type wrist. In order to acquire high accuracy, the methodology of measuring the output shafts by additional sensors instead of using encoder outputs at the motor shafts is proposed. In the kinematic view point, the hybrid manipulator reduces to a serial one, if the passive joints in the U-P serial chain at the center of the parallel manipulator are directly measured by additional sensors. Using the method of successive screw displacements, the kinematic error model is derived. Since a ball-bar is less expensive than a full position measurement device and sufficiently accurate for calibration, the kinematic calibration method of using a ball-bar is presented. The effectiveness of the calibration method has been verified through the simulations. Finally, the calibration experiment shows that the position accuracy of the prototype machine tool has been improved from 153 to $86{\mu}m$.

Compensation of Initial Position Error and Torque Ripple in Vector Control of Two-phase Hybrid Stepping Motors (2상 하이브리드 스테핑 모터의 벡터 제어 시 초기 각 오차 및 토크 리플 보상)

  • Do-Hyun, Kim;Sang-Hoon, Kim
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.6
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    • pp.481-488
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    • 2022
  • This study proposes compensation methods for the initial position error and torque ripple in vector control of two-phase hybrid stepping motors. Stepping motors have an asymmetrical structure due to misalignment, such as the eccentricity generated by the manufacturing and assembly process. When vector control is applied using the position information measured by an incremental encoder attached to the rotor shaft of such stepping motors, the following problems occur. First, an initial position error occurs during the forced excitation process for the initial rotor position alignment. Second, torque ripple corresponding to the mechanical rotation frequency is generated. In this study, these non-ideal phenomena that occur in vector control of the stepping motor are analyzed, and compensation methods are proposed to eliminate them. The validity of the proposed initial position error and torque ripple compensation methods is verified through experiments on a two-phase hybrid stepping motor drive system.

Hardware Design of High Performance In-loop Filter in HEVC Encoder for Ultra HD Video Processing in Real Time (UHD 영상의 실시간 처리를 위한 고성능 HEVC In-loop Filter 부호화기 하드웨어 설계)

  • Im, Jun-seong;Dennis, Gookyi;Ryoo, Kwang-ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.401-404
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    • 2015
  • This paper proposes a high-performance in-loop filter in HEVC(High Efficiency Video Coding) encoder for Ultra HD video processing in real time. HEVC uses in-loop filter consisting of deblocking filter and SAO(Sample Adaptive Offset) to solve the problems of quantization error which causes image degradation. In the proposed in-loop filter encoder hardware architecture, the deblocking filter and SAO has a 2-level hybrid pipeline structure based on the $32{\times}32CTU$ to reduce the execution time. The deblocking filter is performed by 6-stage pipeline structure, and it supports minimization of memory access and simplification of reference memory structure using proposed efficient filtering order. Also The SAO is implemented by 2-statge pipeline for pixel classification and applying SAO parameters and it uses two three-layered parallel buffers to simplify pixel processing and reduce operation cycle. The proposed in-loop filter encoder architecture is designed by Verilog HDL, and implemented by 205K logic gates in TSMC 0.13um process. At 110MHz, the proposed in-loop filter encoder can support 4K Ultra HD video encoding at 30fps in realtime.

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