• 한국학교수학회논문집
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• 제4권2호
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• pp.135-142
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• 2001

The selected questions for this study was their conversation in problem solving way of working together. To achieve its purpose researcher I chose more detail questions for this study as follows. $\circled1$ What is the difference of strategy according to its level \ulcorner $\circled2$ What is the mathematical ability difference in problem solving process concerning its level \ulcorner This is the result of the study $\circled1$ Difference in the strategy of each class of students. High class-high class students found rules with trial and error strategy, simplified them and restated them in uncertain framed problems, and write a formula with recalling their theorem and definition and solved them. High class-middle class students' knowledge and understanding of the problem, yet middle class students tended to rely on high class students' problem solving ability, using trial and error strategy. However, middle class-middle class students had difficulties in finding rules to solve the problem and relied upon guessing the answers through illogical way instead of using the strategy of writing a formula. $\circled2$ Mathematical ability difference in problem solving process of each class. There was not much difference between high class-high class and high class-middle class, but with middle class-middle class was very distinctive. High class-high class students were quick in understanding and they chose the right strategy to solve the problem High class-middle class students tried to solve the problem based upon the high class students' ideas and were better than middle class-middle class students in calculating ability to solve the problem. High class-high class students took the process of resection to make the answer, but high class-middle class students relied on high class students' guessing to reconsider other ways of problem-solving. Middle class-middle class students made variables, without knowing how to use them, and solved the problem illogically. Also the accuracy was relatively low and they had difficulties in understanding the definition.

• 대한전자공학회논문지TC
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• 제47권7호
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• pp.128-134
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• 2010

본 논문에서는 저부엽과 저손실 특성을 갖는 고전력 20-출력 스트립라인 전력분배기를 설계, 제작하고 측정하였다. 20-출력전력분배기는 S 대역 선형 배열 안테나의 급전회로를 위해 설계되었으며, 좁은 빔폭과 매우 낮은 저부엽 특성을 위해 Dolph-Chebyshev 전류 분포를 활용하였다. 20-출력 전력분배기는 8-출력 분배기 1개, 4-출력 분배기 3개와 링 하이브리드 전력분배기 3개로 구성되었으며, 전력분배의 기본적인 구조로는 T-접합 분배 구조를 사용하였다. 삽입손실과 반사손실을 개선하기 위해서 노치를 T-접합 분배 구조에 적용하였으며 N형 커넥터와 스트립라인 사이의 천이구조를 수정하였다. 설계, 제작된 전력분배기는 대역 내에서 약 0.3 dB의 삽입손실과 8o 보다 작은 rms 위상 부정합 특성을 보였다. 20-출력 전력분배기 2개를 대칭적으로 구성할 경우 40 dB 이상의 저부엽 특성 결과를 20-출력 전력분배기 측정 결과로부터 합성할 수 있었다.

• Journal of electromagnetic engineering and science
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• 제11권1호
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• pp.16-26
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• 2011

This paper presents high power and high efficiency Doherty amplifiers for 2.345 GHz wireless broadband (WiBro) applications that use a Nitronex 125-W ($P_{3dB}$) GaN high electron mobility transistor (HEMT). Two- and three-way Doherty amplifiers and a saturated Doherty amplifier using Class-F circuitry are implemented. The measured result for a center frequency of 2.345 GHz shows that the two-way Doherty amplifier attains a high $P_{3dB}$ of 51.5 dBm, a gain of 12.5 dB, and a power-added efficiency (PAE) improvement of about 16 % compared to a single class AB amplifier at 6-dB back-off power region from $P_{3dB}$. For a WiBro OFDMA signal, the Doherty amplifier provides an adjacent channel leakage ratio (ACLR) at 4.77 MHz offset that is -33 dBc at an output power of 42 dBm, which is a 9.5 dB back-off power region from $P_{3dB}$. By employing a digital pre-distortion (DPD) technique, the ACLR of the Doherty amplifier is improved from -33 dBc to -48 dBc. The measured result for the same frequency shows that the three-way Doherty amplifier, which has a $P_{3dB}$ of 53.16 dBm and a gain of 10.3 dB, and the saturated Doherty amplifier, which has a $P_{3dB}$ of 51.1 dBm and a gain of 10.3 dB, provide a PAE improvement of 11 % at the 9-dB back-off power region and 7.5 % at the 6-dB back-off region, respectively, compared to the two-way Doherty amplifier.

• 한국항해항만학회지
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• 제26권3호
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• pp.289-294
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• 2002

본 논문에서는 디지털 TV 중계기용 고출력 광대역의 3-Way 전력결합기를 설계.제작하였다. 대역폭 증가와 고출력을 동시에 이루기 위하여 Wilkinson 형태의 전력분배기를 채택하였다. 우선 Wilkinson 전력분배기를 균등(1 : 1) 및 비균등(2 : 1) 분배시켜, 동위상 4 포트 전력결합기를 시뮬레이션 하였다. 시뮬레이션 결과에 따라서 두께 120 mil인 유전체 기판을 사용하여 제작된 전력결합기는 디지털 TV 중계기 주파수 470~806 MHz 대역에서 삽입손실 -6.53dB 이하, 반사계수 -13dB 이하, 포트 간 분리도 -15 dB 이하, 출력 포트 간 위상차가 13$^{\circ}$이하의 특성을 보였다. 새롭게 만든 전력결합기는 회로에서의 고 임피던스로 인한 마이크로스트립 선로 폭의 한계와 고출력의 경우 선로간의 상호작용으로 인한 전력의 손실 및 협대역의 문제를 동시에 개선이 가능함을 알 수 있었다. 나아가서, 제작된 3-Way 결합기의 삽입손실, 반사계수, 포트간의 분리도 및 위상차가 디지털 TV 중계주파수 470~806 MHz에서 양호한 특성을 나타내는 것을 확인함으로써 고출력 및 광대역화가 실현가능하다는 것을 알 수 있었다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.105-108
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• 2002

Although asynchronous designs have become a promising way to develop complex modern digital systems, there is a few complete design framework for VLSI designers who wish to use automatic CAD tools. Especially, high-level synthesis is not widely concerned until now. In this paper we Proposed a method for high-level synthesis of asynchronous systems as a part of an asynchronous design framework. Our method performs scheduling, allocation, and binding, which are three subtasks of high-level synthesis, in simultaneous using a transformational approach. To deal with complexity of high-level synthesis we use neighborhood search algorithm such as Tabu search.

• 한국인터넷방송통신학회논문지
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• 제9권5호
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• pp.31-37
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• 2009

양방향 중계 채널에서는 중계기가 복호 후 재전송 혹은 증폭 후 재전송 프로토콜을 기반으로 두 사용자에게 네트워크 부호화된 신호를 전송한다. 이러한 양방향 중계 채널 시스템에서 신호 대 잡음비(SNR)가 낮은 환경에서는 복호 후 재전송 프로토콜이 최대 전송량을 가지고, 신호 대 잡음비가 높은 환경에서는 증폭 후 재전송 프로토콜이 최대 전송량을 가진다. 따라서 본 논문에서는 양방향 중계 채널에서 중계기가 수신한 신호 대 잡음비에 따라 증폭 후 재전송(Amplify-and-Forward, AF) 혹은 복호 후 재전송(Decode-and-Forward, DF)프로토콜을 결정하는 능동적인 전송 기법을 제안하였다. 전송 기법이 스위칭(switching)되는 최적의 임계값을 계산하였고, 제안하는 기법이 기존의 양방향 중계 채널에서의 전송 기법보다 우수한 전송량을 보임을 수식적인 결과를 통해 확인하였다.

• Journal of information and communication convergence engineering
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• 제22권1호
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• pp.14-22
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• 2024

This study presents the design of a Wilkinson power divider for three-way output ports (WPD3OP), which incorporates a defected ground structure (DGS). An asymmetric power divider is integrated into the output ports of the conventional Wilkinson power divider (WPD), establishing a three-way output port configuration. The DGS introduces periodic or irregular patterns into the ground plane to suppress unwanted electromagnetic wave propagation, and its incorporation can enhance the performance of the power divider, in terms of the power-division ratio, isolation, and bandwidth, by reducing spurious resonances. The proposed design algorithm for an asymmetric power divider for three-way output ports is analyzed via circuit simulations using High-Frequency Simulation Software (HFSS). The results verify the validity of the proposed method. The analysis of the WPD3OP integrated with DGS certifies the achievement of a center frequency of 2 GHz. This confirmation is supported by schematic ideal design simulation results and measurements encompassing insertion losses, return losses, and isolation.

• Journal of Power Electronics
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• 제17권2호
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• pp.346-357
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• 2017

The Modular Multilevel Converter (MMC) is particularly attractive for medium and high power applications such as High-Voltage Direct Current (HVDC) systems. In order to reach a high voltage, the number of cascaded submodules (SMs) is generally very large. Thus, in the applications with hundreds or even thousands of SMs such as MMC-HVDCs, the sorting algorithm of the conventional voltage balancing strategy is extremely slow. This complicates the controller design and increases the hardware cost tremendously. This paper presents a Two-Way Merge Sort (TWMS) strategy based on the prediction of the capacitor voltages under ideal conditions. It also proposes an innovative Insertion Sort Correction for the TWMS (ISC-TWMS) to solve issues in practical engineering under non-ideal conditions. The proposed sorting methods are combined with the features of the MMC-HVDC control strategy, which significantly accelerates the sorting process and reduces the implementation efforts. In comparison with the commonly used quicksort algorithm, it saves at least two-thirds of the sorting execution time in one arm with 100 SMs, and saves more with a higher number of SMs. A 501-level MMC-HVDC simulation model in PSCAD/EMTDC has been built to verify the validity of the proposed strategies. The fast speed and high efficiency of the algorithms are demonstrated by experiments with a DSP controller (TMS320F28335).

• 한국콘크리트학회:학술대회논문집
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• 한국콘크리트학회 1999년도 학회창립 10주년 기념 1999년도 가을 학술발표회 논문집
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• pp.869-881
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• 1999

Inchon International Airport Elevated Road Way is located between the Passenger Terminal Building and Transportaion Center which are Inchon International Airport core construction projects. The deck of the bridge is consists of 5-span or 6-span continuous pre-stressed concrete slab. Steel form has been used to enhance the quality of texture on concrete slab. Steel form has been used to enhance the quality of texture on concrete surface, lower surface of deck slab with the two way arch has been manufactured by highly professional manner in order to get an beautiful exterior architectural looks. The prestressed concrete deck slab is mass concrete structures with a high-specified concrete strength and a varying section in the range of 0.95-2.8m thickness. Therefore high risks of thermal cracking occurrence by heat of hydration highly are expected. To resolve such problem, we adopted type 1 cement and pipe cooking method at construction site through mass concrete specimen test and 3-dimensional analysis. For Pipe cooling we used 25mm diameter stainless pipes with wrinkles. Cooling pipe with spacing 50-60cm has been installed. And continuous pipe cooling with cooling water of 15$^{\circ}C$ was conducted for 2days. In present 8 span of all 29 spans construction has been completed. No thermal cracking heat hydration has been observed yet.

• Journal of Communications and Networks
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• 제18권5호
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• pp.677-687
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• 2016

Multi-way relay networks (MWRNs) allow multiple users to exchange information with each other through a single relay terminal. MWRNs are often incorporated with capacity achieving lattice codes to enable the benefits of high-rate signal constellations to be extracted. In this paper, we analytically characterize the symbol error rate (SER) performance of a functional decode and forward (FDF) MWRN in the presence of channel estimation errors. Considering M-ary quadrature amplitude modulation (QAM) with square constellations as an important special case of lattice codes, we obtain asymptotic expressions for the average SER for a user in FDF MWRN. The accuracy of the analysis at high signal-to-noise ratio is validated by comparison with the simulation results. The analysis shows that when a user decodes other users with better channel conditions than itself, the decoding user experiences better error performance. The analytical results allow system designers to accurately assess the non-trivial impact of channel estimation errors and the users' channel conditions on the SER performance of a FDF MWRN with M-QAM modulation.