• Title/Summary/Keyword: high-speed data communications

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A study on the short-range underwater communication using visible LEDs (근거리 수중통신을 위한 가시광 LED 적용에 관한 연구)

  • Sohn, Kyung-Rak
    • Journal of Advanced Marine Engineering and Technology
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    • v.37 no.4
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    • pp.425-430
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    • 2013
  • Robust and high speed underwater communication is severely limited when compared to communications in terrestial. In free space, RF communication operates over long distances at high data rates. However, the obstacle in seawater is the severe attenuation due to the conducting nature. Acoustic modems are capable of long range communication up to several tens of kilometers, but it has low data-rate, high power consumption and low propagation speed. An alternative means of underwater communication is based on optics, wherein high data rates are possible. In this paper, the characteristics of underwater channel in the range of visible wavelength is investigated. And the possibility of optical wireless communication in underwater is also described. The LED-based transceiver and CMOS sensor module are integrated in the system, and the performance of image transmission was demonstrated.

Efficient Interface circuits of Embedded Memory for RISC-based DSP Microprocessor (RICS-based DSP의 효율적인 임베디드 메모리 인터페이스)

  • Kim, You-Jin;Cho, Kyoung-Rok;Kim, Sung-Sik;Cheong, Eui-Seok
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.9
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    • pp.1-12
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    • 1999
  • In this paper, we designed an embedded processor with 128Kbytes EPROM and 4Kbytes SRAM based on GMS30C2132 which RISC processor with DSP functions. And a new architecture of bus sharing to control the embedded memory and external memory unit i proposed aiming at one-cycle access between memories and CPU. For embedded 128Kbytes EPROM, we designed the new expansion interface for data size at data ordering with memory organization and the efficient interface for test. The embedded SRAM supports an extended stack area high speed DSP operation, instruction cache and variable data-length control which is accessed with 4K modulo addressing schemes. The proposed new architecture and circuits reduced the memory access cycle time from 40ns and improved operation speed 2-times for program benchmark test. The chip is occupied $108.68mm^2$ using $0.6{\mu}m$ CMOS technology.

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An Augmented WiMAX MMR Protocol for Establishing Secure Broadband Maritime Data Networks (안전한 광대역 해상정보통신망 구축을 위한 WiMAX MMR 확장 프로토콜)

  • Lee, Su-Hwan;Son, Joo-Young
    • Journal of Advanced Marine Engineering and Technology
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    • v.34 no.8
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    • pp.1145-1152
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    • 2010
  • Currently economical communication technologies are needed for high speed data exchange at sea. Wireless environments at sea require some special communication security solutions as well. In this paper, an augmented WiMAX MMR protocol is proposed as a solution of the broadband data communications and security at sea environments fundamentally with no base station.

Enhanced Architecture of the V.42 bis Modem (V.42 bis 모뎀의 새로운 구조)

  • 강창구;조홍근;김대영
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.12
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    • pp.1451-1464
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    • 1992
  • In recent high-speed data moderns for use over PSTN or leased line, the data compression technique based on CCITT V.42bis Recommendation is of popular use along sith CCITT V.42 error control function. A remaining concern to advanced-application users is the protection against unintended eavesdropping. This paper proposes the architectural model on how the security mechanism should be adopted into the above mentioned error-correction/data compression moderns. Also, the functional definitions and the operational procedures are described in detail for possible implementation.

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A New Modified MPPM for High-Speed Wireless Optical Communication Systems

  • Rouissat, Mehdi;Borsali, Riad A.;Chikh-Bled, Mohammad E.
    • ETRI Journal
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    • v.35 no.2
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    • pp.188-192
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    • 2013
  • Previous work proposed combining multipulse pulse position modulation (MPPM) with pulse amplitude modulation to form multipulse amplitude and position modulation (MPAPM), which is a hybrid modulation that results in an improvement in bandwidth efficiency but a degradation in power efficiency. In this paper, to achieve greater power efficiency and a better data rate, we propose multipulse dual amplitude-width modulation, based on MPAPM and pulse width modulation. The proposed scheme shows a remarkable improvement in data rate and a 1.5-dB improvement in power efficiency over MPAPM, while sustaining the bandwidth efficiency. After introducing symbol structure, we present the theoretical expressions of spectral efficiency, the power requirements, and the normalized data rate, as well as the results of comparing the proposed modulation to MPPM and MPAPM.

An Analysis of Satellite Communications System structure for NCW (NCW대비 군 위성통신 구조 분석)

  • Park, Woo-Chul;Cha, Jae-Ryong;Kim, Jae-Hyun
    • Journal of Satellite, Information and Communications
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    • v.4 no.1
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    • pp.1-7
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    • 2009
  • As the information age comes out, the aspect of future war brings about the many changes in terms of war-fighting environment. Accordingly, information superiority and intelligence-centric warfare have been important and new war-fighting concept such as NCW(network centric warfare) have been turned up. This paper proposed all-weather core-strategy communications systems guaranteeing not only the real-time transmission of the information collected in a battlefield and expansion, automation, and rapidity of a battlefield but also broadband, mobility, survivability, and flexibility. The proposed military satellite communications system is classified into wideband mass capacity link, survivability, and the system supporting OTM(on the move) communication for the real-time transmission of battlefield information. This paper analyzed the essential operation concepts and core schemes of the U.S. Army's next generation system, TSAT(Transformational Satellite Communication System). Base on the analysis results, this paper proposed that the architecture of next generation military satellite communications systems for NCW have to provide the data rate, anti-jamming capability, network control and management capability which are optimally adaptable for the wireless channel environments such as jamming and interference and to support the variety of platforms like high-speed mobile vehicles, micromini devices, super-high speed unmanned aerial vehicles. Finally, this paper also proposed that next generation military satellite communications systems need the technologies such as the adaptable multi-antenna, laser link, and next-generation anti-jamming waveform.

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Design and Implementation of the 155Mbps Adaptive CODEC for Ka-band Satellite Communications

  • Park, Eun-A;Chang, Dae-Ig;Kim, Nae-Soo
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1940-1943
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    • 2002
  • In this paper, we presented the design and implementation of 155Mbps satellite Modem adaptively compensated against the rain attenuation. In order to compensate the rain attenuation over high-speed satellite ink, the adaptive coding schemes with variable coding rates and the pragmatic TCM that can be decoded both the QPSK and TC-8PSK using same Viterbi decoder was studied and analyzed. The pragmatic TCM with rate 213, selected to the optimal parameters for implementation, was modeled by VHDL in this paper. The key design issues are how to achieve a high data rate and how to integrated into a single ASIC chip various functions such as the different data rates, Scrambler/descrambler, Interleaver, Encoder/decoder, and BPSK/QPSK/8PSK modulator/demodulator. The implemented 155M0ps adaptive MODEM has the simplified interface circuits among the many functional blocks, and parallel processing architecture to achieve the high data rate. This 155Mbps adaptive MODEM was designed and implemented by single ASIC chip with the 0.25 $\mu\textrm{m}$ CMOS standard cell technology.

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Restricted Multi-hop Information Lookahead Scheme for Real-Time Data Dissemination in Wireless Sensor Networks (무선 센서 망에서 실시간 데이터 전송을 위한 제한적 멀티-홉 정보 예측 기법)

  • Jung, Ju-Hyun;Oh, Seung-Min;Lee, Jeong-Cheol;Park, Ho-Sung;Yim, Yong-Bin;Kim, Sang-Ha
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.7A
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    • pp.706-714
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    • 2010
  • In wireless sensor networks, real-time data delivery schemes typically achieve a desired delivery speed by performing one-hop lookahead. Recently, to reduce the deadline miss ratio against the desired delivery speed, a study has proposed a real-time routing protocol based on proactively performing two-hop lookahead. However, the study might cause heavy message exchange overhead and high computing complexity to carry out obtainment of two-hop neighborhood speed information in the entire sensor nodes whether data are delivered or not. Moreover, although multi-hop lookahead provides the least deadline miss ratio, due to the restriction from the overhead and the complexity, the recent study merely adopts the two-hop lookahead manner. In this paper, we propose a novel real-time routing protocol that adopts on-demand neighborhood multi-hop information obtainments only around data forwarding paths. Simulation results prove that the proposed routing protocol offers better performances with respect to deadline miss ratio, total communication costs, energy efficiency, and network lifetime.

Phase Synchronization Algorithm for High-speed Satellite Communications (고속 위성 통신용 위상 동기 방식)

  • ;Duc-Long
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.7A
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    • pp.836-843
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    • 2004
  • In per survivor processing (PSP) has a better performance than conventional phase offset estimators. But itsdefect is that it has a high complexity. In this paper, we propose the adaptive reduced state estimator (ARSE) algorithm not only to reduce the complexity, but also to have a good performance. The main principle of ARSE is changing the number of estimators dynamically during the decoding process according to the channel condition.

A Study on the high-speed Display of Radar System Positive Afterimage using FPGA and Dual port SRAM (FPGA와 Dual Port SRAM 적용한 Radar System Positive Afterimage 고속 정보 표출에 관한 연구)

  • Shin, Hyun Jong;Yu, Hyeung Keun
    • Journal of Satellite, Information and Communications
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    • v.11 no.4
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    • pp.1-9
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    • 2016
  • This paper was studied in two ways with respect to the information received from the video signal separation technique of PPI Scop radar device. The proposed technique consists in generating an image signal through the video signal separation and synthesis, symbol generation, the residual image signal generation process. This technology can greatly improve the operating convenience with improved ease of discrimination, screen readability for the operator in analyzing radar information. The first proposed method was constructed for high-speed FPGA-based information processing systems for high speed operation stability of the system. The second proposed method was implemented intelligent algorithms and a software algorithm function curve associated resources.This was required to meet the constraints on the radar information, analysis system. Existing radar systems have not the frame data analysis unit image. However, this study was designed to image data stored in the frame-by-frame analysis of radar images with express information MPEG4 video. Key research content is to highlight the key observations expresses the target, the object-specific monitoring information to the positive image processing algorithm and the function curve delays. For high-definition video, high-speed to implement data analysis and expressing a variety of information was applied to the ARM Processor Support in Pro ASIC3.