• The Journal of Korean Institute of Communications and Information Sciences
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• v.11 no.6
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• pp.379-387
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• 1986

The architecture and design of a highperformance general-purpose microprogrammable sequential controller are presented. Conventional sequential controllrs are limited by speed, memory requirement, flexibility and programming ease. The proposed controller solves those limitations. it has a fixed hardware and is microprogrammable throutgh firmware modification. It is especially designed for complex high-speed sequential controllers requiring large I/O capabilities, such as industrial process ocntroller or power electronic conversion controller.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.13 no.6
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• pp.370-479
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• 1988

This paper presents a microprogrammable sequential controller which realizes the sequential logic system with parallel sequences described by a GRAFCET. The proposed controller improves speed, flexibility, programming ease and the efficiency of controlled system by paralle sequencing capability. It is especially designed for complex high speed sequential contollers requiring large I/O capabilities, such as industrial process controller or power electronic conversion controller.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.13 no.6
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• pp.470-470
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• 1988

This paper presents a microprogrammable sequential controller which realizes the sequential logic system with parallel sequences described by a GRAFCET. The proposed controller improves speed, flexibility, programming ease and the efficiency of controlled system by paralle sequencing capability. It is especially designed for complex high speed sequential contollers requiring large I/O capabilities, such as industrial process controller or power electronic conversion controller.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.1
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• pp.12-21
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• 1999

All kinds of electronic machinery including portable communication system are being smaller size and are used at high frequency. It generates a lot of unwanted noise signals called electromagnetic interface (EMI). This paper presents an analysis result of EMI generation in VLSI and propose new circuits to minimize of EMI using I/O driver with parallel buffer architecture and distributed decoupling capacitor in a chip. The proposed circuits are evaluated with i8052 MCU which is shown reducing of delta current 1/3 times and improvement of EMI more 10dBuV compared with conventional processors.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2000.11a
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• pp.413-418
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• 2000

For Pneumatic system control, we need a data transmission system with high speed and high realibility for information interchange between main computer and solenoid valves and I/O devices. This paper presents a set of design techniques for a data communication system that is mainly used for pneumatic system control. For this purpose, we first designed hardware modules for an interface between central control module and local node that handles the operation of solenoid valves. In addition we developed a communication protocol for construction of RS-485 based multidrop network, and this protocol is basically designed with a kind of polling technique. Finally we evaluated performance of the developed system. The field test results show that, even under high noise environment, the data transmission of 375Kbps rate is possible up to 1,000m without using repeater. In addition, the system developed in this research is proved to be used easily for extension of a communication network because of its module structure.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.176-176
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• 2003

The effects of oxide thickness and gate length of MgO/GaN metal oxide semiconductor field effect transistors (MOSFETs) on I-V, threshold voltage and breakdown voltage characteristics were examined using a drift-diffusion model. The saturation drain current scales in an inverse logarithmic fashion with MgO thickness and is < 10$^{-3}$ A.${\mu}{\textrm}{m}$$^{-1}$ for 0.5 ${\mu}{\textrm}{m}$ gate length devices with oxide thickness > 600 $\AA$ or for all 1 ${\mu}{\textrm}{m}$ gate length MOSFETs with oxide thickness in the range of >200 $\AA$. Gate breakdown voltage is > 100 V for gate length >0.5 ${\mu}{\textrm}{m}$ and MgO thickness > 600 $\AA$. The threshold voltage scales linearly with oxide thickness and is < 2 V for oxide thickness < 800 $\AA$ and gate lengths < 0.6 ${\mu}{\textrm}{m}$. The GaN MOSFET shows excellent potential for elevated temperature, high speed applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.390-390
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• 2010

We fabricate Schottky diodes with the contact between a sol-gel derived ZnO layer and Au that guarantees the expected Schottky contact due to the high work function. The formed single metal Schottky barrier shows characteristics comparable to the barrier formed by alloys. Au is deposited by thermal evaporation on a ZnO thin film that is optimally formed under sol-gel process conditions of a 1-mol zinc acetate concentration and a 3000-rpm coating speed. Possible defects. which can provide deleterious current paths. are minimized by patterning the deposited Au. The I-V curve verifies the formation of a Schottky contact. Measurements showed that the Schottky barrier height and leakage current at -5 V were 0.6 eV and $1{\times}10^{-12}A$. respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.368-369
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• 2006

Ferroelectric thin films have attracted much attention for applications in nonvolatile ferroelectric random access memories(NVFeRAM) from the view points of high speed operation, low power consumption, and large scale Integration[1,2]. Among the FRAM, BLT is of particular interest. as it is not only crystallized at relatively low processing temperature, but also shows highly fatigue resistance and large remanent polarization Meanwhile, these submicron ferroelectric capacitors were fabricated by a damascene process using Chemical mechanical polishing (CMP). BLT capacitors were practicable by a damascene process using CMP. The P-E hysteresis were measured under an applied bias of ${\pm}5V$ by using an RT66A measurement system. The electric properties such as I-V were determined by using HP4155A analysers.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.5
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• pp.386-389
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• 2009

The electrical characteristics and annealing effects of tunneling dielectrics stacked with $SiO_2$ and $Si_{3}N_{4}$ were investigated. I-V characteristics of band gap engineered tunneling gate stacks consisted of $Si_{3}N_{4}/SiO_2/Si_{3}N_{4}$ (NON), $SiO_2/Si_{3}N_{4}/SiO_2$ (ONO) dielectrics were evaluated and compared with $SiO_2$ single layer using the MOS (metal-oxide-semiconductor) capacitor structure. The leakage currents of engineered tunneling barriers (ONO, NON stacks) are lower than that of the conventional $SiO_2$ single layer at low electrical field. Meanwhile, the engineered tunneling barriers have larger tunneling current at high electrical field. Furthermore, the increased tunneling current through engineered tunneling barriers related to high speed operation can be achieved by annealing processes.

• Journal of Broadcast Engineering
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• v.6 no.3
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• pp.246-259
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• 2001

Due to recent rapid deployment of Internet streaming service and digital broadcasting service, the issue of how to efficiently support streaming workload in so called "Internet Home Appliance" receives prime interests from industry as well as academia. The underlying dilemma is that it may not be feasible to put cutting edge CPU, boards, disks and other peripherals into that type of device. The primary reason is its cost. Usually, Internet Home Appliances has its dedicated usage, e.g. Internet Radio, and thus it does not require high-end CPU nor high-end Va subsystem. The same reasoning applies to I/O subsystem. In Internet Home Appliances dedicated to handle compressed moving picture, it is not equipped with high end SCSI disk with fast rotational speed. Thus, it is mandatory to devise elaborate software algorithm to exploit the available hardware resources and maximize the efficiency of the system. This paper presents our experiences in the design and implementation of a new multimedia file system which can efficiently deliver the required disk bandwidth for a periodic I/O workload. We have implemented the file system on the Linux operating system, and examined itsperformance under streaming I/O workload. The results of the study show that the proposed file system exhibits superior performance than the Linux Ext2 file system under streaming I/O workload. The result of this work not only contribute to advance the state f art file system technology for multimedia streaming but also put forth the software which is readily available and can be deployed. deployed.