• Title/Summary/Keyword: high-speed I/O

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Design and Implementation of Backup and Recovery System (백업 및 복원 시스템의 설계 및 구현)

  • Lee, Moon-Ku
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.1133-1136
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    • 2005
  • The proposed high-speed backup and recovery system is a high performance backup software based on multi streaming I/O and high speed/high compression technology, and can realize an increase efficiency of backup volume without any increase of backup H/W equipments since it provides a high performance in data backup of a user and executes high compression very fast. Particularly, it minimizes consumption of network band width through a development of algorism for high compression in connection with backup equipments in a large-scaled system environment, is automated when it is recovered due to danger and troubles, and allows users to conveniently access in various ways since GUI and CLI for execution and management are all provided.

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Novel Power Bus Design Method for High-Speed Digital Boards (고속 디지털 보드를 위한 새로운 전압 버스 설계 방법)

  • Wee, Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.12 s.354
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    • pp.23-32
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    • 2006
  • Fast and accurate power bus design (FAPUD) method for multi-layers high-speed digital boards is devised for the power supply network design tool for accurate and precise high speed board. FAPUD is constructed, based on two main algorithms of the PBEC (Path Based Equivalent Circuit) model and the network synthesis method. The PBEC model exploits simple arithmetic expressions of the lumped 1-D circuit model from the electrical parameters of a 2-D power distribution network. The circuit level design based on PBEC is carried with the proposed regional approach. The circuit level design directly calculates and determines the size of on-chip decoupling capacitors, the size and the location of off-chip decoupling capacitors, and the effective inductances of the package power bus. As a design output, a lumped circuit model and a pre-layout of the power bus including a whole decoupling capacitors are obtained after processing FAPUD. In the tuning procedure, the board re-optimization considering simultaneous switching noise (SSN) added by I/O switching can be carried out because the I/O switching effect on a power supply noise can be estimated over the operation frequency range with the lumped circuit model. Furthermore, if a design changes or needs to be tuned, FAPUD can modify design by replacing decoupling capacitors without consuming other design resources. Finally, FAPUD is accurate compared with conventional PEEC-based design tools, and its design time is 10 times faster than that of conventional PEEC-based design tools.

PHYSICAL CHARACTERISTICS OF CORONAL REGION DRIVING OUT THE INTERPLANETARY SHOCK (행성간 충격파 발생 코로나 영역의 물리적 특성)

  • Oh, Su-Yeon;Yi, Yu
    • Journal of Astronomy and Space Sciences
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    • v.25 no.1
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    • pp.25-32
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    • 2008
  • Using the solar wind data of 2000 observed by ACE, We classified the interplanetary shock on basis of shock driver. We examined the physical properties of shock drivers such as the ratio of charge states(O7/O6) and thermal index$(I_{th})$. Most of 51 interplanetary shocks are driven by interplanetary coronal mass ejections(ICME; magnetic cloud and ejecta) and high speed streams. According to the test of temperature(O7/O6) and $I_{th}$, we found that ICMEs originated from region with hot source in corona.

A Study on the Design and Development of Automatic Optical Fiber Aligner (자동 광섬유 정렬 장치의 설계 및 제작에 관한 연구)

  • Kim, Byung-Hee;Uhm, Chul;Choi, Young-Suk
    • Journal of Industrial Technology
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    • v.22 no.B
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    • pp.241-249
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    • 2002
  • Optical fiber is indispensable for optical communication systems that transmit large volumes of data at high speed, but super precision technology in sub-micron units is required for optical axis adjustment. We developed the automatic optical fiber by image processing and automatic loading system. we have developed 6-axis micro stage system for I/O optical fiber arrays, the initial automatic aligning system software for a input optical array by the image processing technique, fast I/O-synchronous aligning strategy, the automatic loading/unloading system and the automatic UV bonding mechanism. In order to adjust the alignment it used on PC based motion controller, a $10{\mu}m$ repeat-detailed drawing of automatic loading system is developed by a primary line up for high detailed drawing. Also, at this researches used the image processing system and algorithm instead of the existing a primary hand-line up and fiber input array and waveguide chip formed in line by automatic.

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Column-aware Polarization Scheme for High-Speed Database Systems (고속 데이터베이스 시스템을 위한 컬럼-인지 양분화 기법)

  • Byun, Si-Woo
    • Journal of Internet Computing and Services
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    • v.13 no.3
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    • pp.83-91
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    • 2012
  • Recently, column-oriented storage has become a progressive model for high-speed database systems because of its superior I/O performance. In this paper, we analysis traditional raw-oriented storage model and then propose a new column-aware storage management model using flash memory drive and assist drive to improve the effective performance of the high-speed column-oriented database system. Our storage management scheme called column-aware polarization improves the performance of update operation by dividing and compressing table columns into active-columns or inactive-columns, and balancing congested update operations using a assist drive in high workload periods. The results obtained from experimental tests show that our scheme improves the update throughput of column-oriented storage by 19 percent, and the response time by up to 49 percent.

Path based K-means Clustering for RFID Data Sets

  • Yun, Hong-Won
    • Journal of information and communication convergence engineering
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    • v.6 no.4
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    • pp.434-438
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    • 2008
  • Massive data are continuously produced with a data rate of over several terabytes every day. These applications need effective clustering algorithms to achieve an overall high performance computation. In this paper, we propose ancestor as cluster center based approach to clustering, the K-means algorithm using ancestor. We modify the K-means algorithm. We present a clustering architecture and a clustering algorithm that minimize of I/Os and show a performance with excellent. In our experimental performance evaluation, we present that our algorithm can improve the I/O speed and the query processing time.

Development of Large Scale Programmable Controller : Part I(H/W) (대형 프로그래머블 콘트롤러의 개발 1)

  • 권욱현;김종일;김덕우;정범진;홍진우
    • 제어로봇시스템학회:학술대회논문집
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    • 1987.10b
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    • pp.407-412
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    • 1987
  • A large scale programmable controller is developed which adopts a multiprocessor structure. The developed programmable controller consists of the programmer, the system controller, and the input-output unit. The structure and characteristics of the system controller will be described. The PC has a special hardware scheme to solve the Boolean logic instructions of the sequence control programs. The multiprocessor structure and the special hardware enables, the real time operation and the high speed scanning which is prerequisite to the large scale, programmable controller even for many I/O points.

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The Control of DC Servo Motor Applying High-speed Design System (고속 설계시스템을 응용한 DC 서보 모터의 제어)

  • 최환도;김재헌;김중완
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2002.10a
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    • pp.675-678
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    • 2002
  • A controller was designed generally using C or assembly languages on high-speed design controller. But, in this paper, DC servo controller is designed using the cord of the block-diagram of SIMTool. By the method, we can design, realized and analyzed a control system quickly in real-time. And we expect that the various plants of a robot vehicles are controled through the outside I/O board changing the structure of the block-diagram of SIMTool into AUTOTool. In addition, our developed system helps the most suitable automatic controller design and tester with hight-speed.

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Design of Analog ASIC for high frequency Phase Lock Loop (IEEE1394 S800대응 고주파 PLL ASIC 설계)

  • Kim, Y.W.;Lee, H.B.;Cho, G.O.;Han, D.I.;Lee, K.W.
    • Proceedings of the KIEE Conference
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    • 1998.11b
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    • pp.582-584
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    • 1998
  • IEEE1394 is an international standard that will integrate entertainment, communication, and computing electronics into consumer multimedia. IEEE1394 is a hardware and software for transporting data at 100,200, or 400Mbps. There are efforts to create speed improvements to 800 and muti-Gigabit speed s. An 980Mhz frequency synthesizer is proposed for high speed transport and designed by a 0.35um CMOS process.

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Hybrid in-memory storage for cloud infrastructure

  • Kim, Dae Won;Kim, Sun Wook;Oh, Soo Cheol
    • Journal of Internet Computing and Services
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    • v.22 no.5
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    • pp.57-67
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    • 2021
  • Modern cloud computing is rapidly changing from traditional hypervisor-based virtual machines to container-based cloud-native environments. Due to limitations in I/O performance required for both virtual machines and containers, the use of high-speed storage (SSD, NVMe, etc.) is increasing, and in-memory computing using main memory is also emerging. Running a virtual environment on main memory gives better performance compared to other storage arrays. However, RAM used as main memory is expensive and due to its volatile characteristics, data is lost when the system goes down. Therefore, additional work is required to run the virtual environment in main memory. In this paper, we propose a hybrid in-memory storage that combines a block storage such as a high-speed SSD with main memory to safely operate virtual machines and containers on main memory. In addition, the proposed storage showed 6 times faster write speed and 42 times faster read operation compared to regular disks for virtual machines, and showed the average 12% improvement of container's performance tests.