• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.267-270
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• 2000

This paper describes measurement of relative permittivity of illite found in young-dong area. A measurement of relative permittivity of illite used to cylindrical cavity resonators with moveable cap. A concentric dielectric-rod inserted cylindrical cavity resonator and an exact field representation of travelling wave mode are introduced for measurement of relative permittivity. The exact electromagnetic fields in cylindrical cavity with concentric dielectric rod is analysed. A relative permittivity of dielectric in cavity is calculated by analyzing the characteristic equation. The characteristic equation is solved by using the ContourPlot graph of Mathematica. We know that the field representation of travelling mode is exact. As a result, relative permittivity of dielectric materials were 7.820 at sample-1 and 7.894 at sample-2.

• The KIPS Transactions:PartD
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• v.12D no.2 s.98
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• pp.327-334
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• 2005

The representation of Web Sites with EMFG(Extended Mark Flow Graph) is studied as a new method that represents the complicated Web Sites structure. The Web Sites usually have the number of iteration structures. The representation of these Web Sites with EMFG is too complicated, and so we can not understand the structure of these Web Sites sometimes. Therefore, in this paper, we classify these iteration structures when express Web Sites by EMFG as serial iteration structures and parallel iteration structures and propose the method that can simplify these iteration structures. Then we can reduce number of boxes, arcs, and transitions, and efficiently design and manage Web Sites by using this method.

• The Transactions of the Korea Information Processing Society
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• v.6 no.3
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• pp.781-791
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• 1999

DD(Decision Diagrams) is an efficient operational data structure for an optimal expression of boolean functions. In a graph-based synthesis using DD, the goal of optimization decreases representation space for boolean functions. This paper represents boolean functions using OPKFDD(Ordered Pseudo-Kronecker Functional Decision Diagrams) for a graph-based synthesis and is based on the number of nodes as the criterion of DD size. For a property of OPKFDD that is able to select one of different decomposition types for each node, OPKFDD is variable in its size by the decomposition types selection of each node and input variable order. This paper proposes a method for generating OPKFDD efficiently from the current BDD(Binary Decision Diagram) Data structure and an algorithm for minimizing one. In the multiple output functions, the relations of each function affect the number of nodes of OPKFDD. Therefore this paper proposes a method to decide the input variable order considering the above cases. Experimental results of comparing with the current representation methods and the reordering methods for deciding input variable order are shown.

• International Journal of Computer Science & Network Security
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• v.21 no.12
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• pp.9-20
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• 2021

Abstraction applied in computer networking hides network details behind a well-defined representation by building a model that captures an essential aspect of the network system. Two current methods of representation are available, one based on graph theory, where a network node is reduced to a point in a graph, and the other the use of non-methodological iconic depictions such as human heads, walls, towers or computer racks. In this paper, we adopt an abstract representation methodology, the thinging machine (TM), proposed in software engineering to model computer networks. TM defines a single coherent network architecture and topology that is constituted from only five generic actions with two types of arrows. Without loss of generality, this paper applies TM to model the area of network monitoring in packet-mode transmission. Complex network documents are difficult to maintain and are not guaranteed to mirror actual situations. Network monitoring is constant monitoring for and alerting of malfunctions, failures, stoppages or suspicious activities in a network system. Current monitoring systems are built on ad hoc descriptions that lack systemization. The TM model of monitoring presents a theoretical foundation integrated with events and behavior descriptions. To investigate TM modeling's feasibility, we apply it to an existing computer network in a Kuwaiti enterprise to create an integrated network system that includes hardware, software and communication facilities. The final specifications point to TM modeling's viability in the computer networking field.

• The Journal of Korean Association of Computer Education
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• v.6 no.4
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• pp.61-69
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• 2003

RG(Railway Graph), which is a connected graph structure with the concepts of internal and external edges, is a data structure for representing railway assignments in a track network. In RG, it is possible to represent railway connectivities considering it's forward direction which is impossible in a digraph representation. But with RC, we can not still represent an othogonoal railway crossing in a track network. In this paper, we extend RG using the concept of dummy edge. Using ERG(Extended Railway Graph), we describe a method to consistently represent track network including othogonoal railway crossings, data structure for our ERG, and path allocation algorithm in ERG.

• The KIPS Transactions:PartD
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• v.15D no.5
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• pp.691-698
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• 2008

Web designers generally use a story board, a site map, a flow chart or the combination of these for representing web sites. But these methods are difficult to represent the entire architecture of a web site, and may be not adaptive for describing the detail flow of web pages. To solve these problems to some degree, there were works using EMFG(Extended Mark Flow Graph) recently. However the conventional EMFG representation method is not adaptive to represent the dynamic interface of web sites because that cover only the static parts of a web site. Internet utilization is rapidly growing in our life and we cannot imagine the worlds of work, study and business without internet. And web sites recently have not only more complex and various architecture but also web pages containing the dynamic interface. Therefore we propose the representation method of these web sites - for example, a web site containing varying pages with time and varying page status or contents with mouse operations - using EMFG. We expect our work to be help the design and maintenance of web sites.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.53 no.4
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• pp.210-215
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• 2004

This paper proposes an implicit method for computing the minimum cost feedback vertex set for a graph. For an arbitrary graph, a Boolean function is derived, whose satisfying assignments directly correspond to feedback vertex sets of the graph. Importantly, cycles in the graph are never explicitly enumerated, but rather, are captured implicitly in this Boolean function. This function is then used to determine the minimum cost feedback vertex set. Even though computing the minimum cost satisfying assignment for a Boolean function remains an NP-hard problem, it is possible to exploit the advances made in the area of Boolean function representation in logic synthesis to tackle this problem efficiently in practice for even reasonably large sized graphs. The algorithm has obvious application in flip-flop selection for partial scan. The algorithm proposed in this paper is the first to obtain the MFVS solutions for many benchmark circuits.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1463-1466
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• 1987

The problem of generating minimal area CMOS functional cell layout can be converted to that of decomposing the transistor connection graph into a minimum number of subgraphs, each having a pair of Euler paths with the same sequence of input labels on the N-graph and P-graph, which are portions of the graph corresponding to NMOS and PMOS parts respectively. This paper proposes a heuristic algorithm which yields a nearly minimal number of Euler paths from the path representation formula which represents the give a logic function. Subpath merging is done through a list processing scheme where the pair of paths which results in the lowest cost is successively merged from all candidate merge pairs until no further path merging and further reduction of number of subgraphs are possible. Two examples were shown where we were able to further reduce the number of interlaces, i.e., the number of non-butting diffusion islands, from 3 to 2, and from 2 to 1, compared to the earlier work [1].

• Journal of Korea Society of Industrial Information Systems
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• v.5 no.1
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• pp.1-15
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• 2000

In this paper, an efficient system for finding answers to a given path algebra expression in a directed acylic graph is discussed more particulary, in a multimedia presentration graph. Path algebra expressions are formulated using revised versions of operators next and until of temporal logic, and the connected operator. To evaluate queries with path algebra expressions, the node code system is proposed. In the node code system, the nodes of a presentation graph are assigned binary codes (node codes) that are used to represent nodes and paths in a presentation graph. Using node codes makes it easy to find parent-child predecessor-sucessor relationships between nodes. A pair of node codes for connected nodes uniquely identifies a path, and allows efficient set-at-a-time evaluations of path algebra expressions. In this paper, the node code representation of nodes and paths in multimedia presentation graphs are provided. The efficient algorithms for the evaluation of queries with path algebra expressions are also provided.

• Journal of the Korea Safety Management & Science
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• v.13 no.2
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• pp.231-241
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• 2011

Business processes are often of long duration, and include internal worker's decision making, which makes business processes to be exposed to many exceptional situations. These properties of business processes makes it difficult to guarantee successful termination of business processes at the design phase. The behavioral properties of business processes mainly depends on the data aspects of business processes. To formalize the data aspect of process modeling, this paper proposes a graph-based model, called Data Dependency Graph (DDG), constructed from dependency relationships specified between business data. The paper also defines a mechanism of describing a set of mapping rules that generates a process model semantically equivalent to a DDG, which is accomplished by allocating data dependencies to component activities.