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Design of AES-Based Encryption Chip for IoT Security (IoT 보안을 위한 AES 기반의 암호화칩 설계)

  • Kang, Min-Sup
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.21 no.1
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    • pp.1-6
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    • 2021
  • The paper proposes the design of AES-based encryption chip for IoT security. ROM based S-Box implementation occurs a number of memory space and some delay problems for its access. In this approach, S-Box is designed by pipeline structure on composite field GF((22)2) to get faster calculation results. In addition, in order to achieve both higher throughput and less delay, shared S-Box are used in each round transformation and the key scheduling process. The proposed AES crypto-processor is described in Veilog-HDL, and Xilinx ISE 14.7 tool is used for logic synthesis by using Xilinx XC6VLX75T FPGA. In order to perform the verification of the crypto-processor, the timing simulator(ModelSim 10.3) is also used.

A High Performance Modular Multiplier for ECC (타원곡선 암호를 위한 고성능 모듈러 곱셈기)

  • Choe, Jun-Yeong;Shin, Kyung-Wook
    • Journal of IKEEE
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    • v.24 no.4
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    • pp.961-968
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    • 2020
  • This paper describes a design of high performance modular multiplier that is essentially used for elliptic curve cryptography. Our modular multiplier supports modular multiplications for five field sizes over GF(p), including 192, 224, 256, 384 and 521 bits as defined in NIST FIPS 186-2, and it calculates modular multiplication in two steps with integer multiplication and reduction. The Karatsuba-Ofman multiplication algorithm was used for fast integer multiplication, and the Lazy reduction algorithm was adopted for reduction operation. In addition, the Nikhilam division algorithm was used for the division operation included in the Lazy reduction. The division operation is performed only once for a given modulo value, and it was designed to skip division operation when continuous modular multiplications with the same modulo value are calculated. It was estimated that our modular multiplier can perform 6.4 million modular multiplications per second when operating at a clock frequency of 32 MHz. It occupied 456,400 gate equivalents (GEs), and the estimated clock frequency was 67 MHz when synthesized with a 180-nm CMOS cell library.

Fabrication and Characteristics of Electroplated Sn-0.7Cu Micro-bumps for Flip-Chip Packaging (플립칩 패키징용 Sn-0.7Cu 전해도금 초미세 솔더 범프의 제조와 특성)

  • Roh, Myong-Hoon;Lee, Hea-Yeol;Kim, Wonjoong;Jung, Jae Pil
    • Korean Journal of Metals and Materials
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    • v.49 no.5
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    • pp.411-418
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    • 2011
  • The current study investigates the electroplating characteristics of Sn-Cu eutectic micro-bumps electroplated on a Si chip for flip chip application. Under bump metallization (UBM) layers consisting of Cr, Cu, Ni and Au sequentially from bottom to top with the aim of achieving Sn-Cu bumps $10\times10\times6$ ${\mu}m$ in size, with 20${\mu}m$ pitch. In order to determine optimal plating parameters, the polarization curve, current density and plating time were analyzed. Experimental results showed the equilibrium potential from the Sn-Cu polarization curve is -0.465 V, which is attained when Sn-Cu electro-deposition occurred. The thickness of the electroplated bumps increased with rising current density and plating time up to 20 mA/$cm^2$ and 30 min respectively. The near eutectic composition of the Sn-0.72wt%Cu bump was obtained by plating at 10 mA/$cm^2$ for 20 min, and the bump size at these conditions was $10\times10\times6$ ${\mu}m$. The shear strength of the eutectic Sn-Cu bump was 9.0 gf when the shearing tip height was 50% of the bump height.

A Lightweight Hardware Accelerator for Public-Key Cryptography (공개키 암호 구현을 위한 경량 하드웨어 가속기)

  • Sung, Byung-Yoon;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.23 no.12
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    • pp.1609-1617
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    • 2019
  • Described in this paper is a design of hardware accelerator for implementing public-key cryptographic protocols (PKCPs) based on Elliptic Curve Cryptography (ECC) and RSA. It supports five elliptic curves (ECs) over GF(p) and three key lengths of RSA that are defined by NIST standard. It was designed to support four point operations over ECs and six modular arithmetic operations, making it suitable for hardware implementation of ECC- and RSA-based PKCPs. In order to achieve small-area implementation, a finite field arithmetic circuit was designed with 32-bit data-path, and it adopted word-based Montgomery multiplication algorithm, the Jacobian coordinate system for EC point operations, and the Fermat's little theorem for modular multiplicative inverse. The hardware operation was verified with FPGA device by implementing EC-DH key exchange protocol and RSA operations. It occupied 20,800 gate equivalents and 28 kbits of RAM at 50 MHz clock frequency with 180-nm CMOS cell library, and 1,503 slices and 2 BRAMs in Virtex-5 FPGA device.

Efficient Semi-systolic Montgomery multiplier over GF(2m)

  • Keewon, Kim
    • Journal of the Korea Society of Computer and Information
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    • v.28 no.2
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    • pp.69-75
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    • 2023
  • Finite field arithmetic operations play an important role in a variety of applications, including modern cryptography and error correction codes. In this paper, we propose an efficient multiplication algorithm over finite fields using the Montgomery multiplication algorithm. Existing multipliers can be implemented using AND and XOR gates, but in order to reduce time and space complexity, we propose an algorithm using NAND and NOR gates. Also, based on the proposed algorithm, an efficient semi-systolic finite field multiplier with low space and low latency is proposed. The proposed multiplier has a lower area-time complexity than the existing multipliers. Compared to existing structures, the proposed multiplier over finite fields reduces space-time complexity by about 71%, 66%, and 33% compared to the multipliers of Chiou et al., Huang et al., and Kim-Jeon. As a result, our multiplier is proper for VLSI and can be successfully implemented as an essential module for various applications.

Development of Textile Sensors for Prevention of Forward Head Posture (거북목 예방을 위한 텍스타일 센서 개발)

  • Minsuk kim;Jinhee Park;Jooyong Kim
    • Journal of Fashion Business
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    • v.27 no.4
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    • pp.125-140
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    • 2023
  • This study aimed to develop a smart wearable device for assessing the risk angle associated with turtle neck syndrome in patients with Video Display Terminal (VDT) syndrome. Turtle neck syndrome, characterized by forward head posture resulting from upper cross syndrome, leads to thoracic kyphosis. In this research, a stretch sensor was used to monitor the progression of turtle neck syndrome, and the sensor data was analyzed using a Universal Testing Machine (UTM) and the Gauge Factor (GF) calculation method. The scapula and cervical spine angles were measured at five stages, with 15-degree increments from 0° to 60°. During the experimental process, the stretch sensor was attached to the thoracic spine in three different lengths: 30mm, 50mm, and 100mm. Among these, the attachment method yielding the most reliable data was determined by measuring with three techniques (General Trim Adhesive, PU film, and Heat Transfer Machine), and clothing using the heat transfer machine was selected. The experimental results confirmed that the most significant change in thoracic kyphosis occurred at approximately 30° of forward head posture. Prolonged deformity can lead to various issues, highlighting the need for textile sensor solutions. The developed wearable device aims to provide users with real-time feedback on their turtle neck posture and incorporate features that can help prevent or improve the condition.

Hard TiN Coating by Magnetron-ICP P $I^3$D

  • Nikiforov, S.A.;Kim, G.H.;Rim, G.H.;Urm, K.W.;Lee, S.H.
    • Journal of the Korean institute of surface engineering
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    • v.34 no.5
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    • pp.414-420
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    • 2001
  • A 30-kV plasma immersion ion implantation setup (P $I^3$) has been equipped with a self-developed 6'-magnetron to perform hard coatings with enhanced adhesion by P $I^3$D(P $I^3$ assisted deposition) process. Using ICP source with immersed Ti antenna and reactive magnetron sputtering of Ti target in $N_2$/Ar ambient gas mixture, the TiN films were prepared on Si substrates at different pulse bias and ion-to-atom arrival ratio ( $J_{i}$ $J_{Me}$ ). Prior to TiN film formation the nitrogen implantation was performed followed by deposition of Ti buffer layer under A $r^{+}$ irradiation. Films grown at $J_{i}$ $J_{Me}$ =0.003 and $V_{pulse}$=-20kV showed columnar grain morphology and (200) preferred orientation while those prepared at $J_{i}$ $J_{Me}$ =0.08 and $V_{pulse}$=-5 kV had dense and eqiaxed structure with (111) and (220) main peaks. X-ray diffraction patterns revealed some amount of $Ti_{x}$ $N_{y}$ in the films. The maximum microhardness of $H_{v}$ =35 GN/ $M^2$ was at the pulse bias of -5 kV. The P $I^3$D technique was applied to enhance wear properties of commercial tools of HSS (SKH51) and WC-Co alloy (P30). The specimens were 25-kV PII nitrogen implanted to the dose 4.10$^{17}$ c $m^{-2}$ and then coated with 4-$\mu\textrm{m}$ TiN film on $Ti_{x}$ $N_{y}$ buffer layer. Wear resistance was compared by measuring weight loss under sliding test (6-mm $Al_2$ $O_3$ counter ball, 500-gf applied load). After 30000 cycles at 500 rpm the untreated P30 specimen lost 3.10$^{-4}$ g, and HSS specimens lost 9.10$^{-4}$ g after 40000 cycles while quite zero losses were demonstrated by TiN coated specimens.s.

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Response of two-way reinforced concrete voided slabs enhanced by steel fibers and GFRP sheets under monotonic loading

  • Adel A. Al-Azzawi;Shahad H. Mtashar
    • Structural Monitoring and Maintenance
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    • v.10 no.1
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    • pp.1-23
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    • 2023
  • Various efforts have been made to reduce the weight of concrete slabs while preserving their flexural strength. This will result in reducing deflection and allows the utilization of longer spans. The top zone of the slab requires concrete to create the compression block for flexural strength, and the tension zone needs concrete to join with reinforcing for flexural strength. Also, the top and bottom slab faces must be linked to transmit stresses. Voided slab systems were and are still used to make long-span slab buildings lighter. Eight slab specimens of (1000*1000 (1000*1000 mm2) were cast and tested as two-way simply supported slabs in this research. The tested specimens consist of one solid slab and seven voided slabs with the following variables (type of slab solid and voided), thickness of slab (100 and 125 mm), presence of steel fibers (0% and 1%), and the number of GFRP layers). The voids in slabs were made using high-density polystyrene of dimensions (200*200*50 mm) with a central hole of dimensions (50*50*50 mm) at the ineffective concrete zones to give a reduction in weight by (34% to 38%). The slabs were tested as simply supported slabs under partial uniform loading. The results of specimens subjected to monotonic loading show that the combined strengthening by steel fibers and GFRP sheets of the concrete specimen (V-125-2GF-1%) shows the least deflection, deflection (4.6 mm), good ultimate loading capacity (192 MPa), large stiffness at cracking and at ultimate (57 and 41.74) respectively, more ductility (1.44), and high energy absorption (1344.83 kN.mm); so it's the best specimen that can be used as a voided slab under this type of loading.

Research on the Development of Conductive Composite Yarns for Application to Textile-based Electrodes and Smartwear Circuits (스마트웨어용 텍스타일형 전극 및 배선으로의 적용을 위한 전도성 복합사 개발 연구)

  • Hyelim Kim;Soohyeon Rho;Wonyoung Jeong
    • Fashion & Textile Research Journal
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    • v.25 no.5
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    • pp.651-660
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    • 2023
  • This study aimed to research the local production of conductive composite yarn, a source material used in textile-type electrodes and circuits. The physical properties of an internationally available conductive composite yarn were analyzed. To manufacture the conductive composite yarn, we selected one type of conductive yarn with Ag-coated polyamide of 150d 1 ply, along with two types of polyethylene terephthalate (PET) with circular and triangular cross-sections, both with 150d 1 ply. The conductive composite yarn samples were manufactured at 250, 500, 750, and 1000 turns per meter (TPM). For both conductive composite yarn samples manufactured from two types of PET filaments, the twist contraction rate of the sample with a triangular cross-section was stable. Among the samples, the tensile strength of the sample manufactured at 750 TPM was the highest at approximately 4.1gf/d; the overall linear resistance was approximately 5.0 Ω/cm, which is within the target range. It was confirmed that the triangular cross-section sample manufactured with 750 TPM had a similar linear resistance value to the advanced product despite the increase in the number of twists. In future studies, we plan tomanufacture samples by varying the twist conditions to derive the optimal conductive yarn suitable for smartwear and smart textile manufacturing conditions.

Production of Inulo-oligosaccharides from Chicory(Cichorium intybus, L.) with Endo-inulinase from Arthrobacter sp.537 (새로운 endo-inulinase를 이용한 치커리 추출물로부터 Inulo올리고당의 생산)

  • Kang, Su-Il;Kim, Su-Il
    • Applied Biological Chemistry
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    • v.40 no.1
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    • pp.34-38
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    • 1997
  • For the effective production of functional oligosaccharides(DP 3-5) from inulin in chicory extracts, the acid hydrolysis and enzymatic endo-inulinase reaction were compared. Acid hydrolysis was unfavorable ; the content of oligosacharides in total sugar increased to 26.0% for 12 min at $55^{\circ}C$ and 24.6% at 6 min at $65^{\circ}C$ and showed little change for 30 min. The content of high DP(DP 6) decreased from 83.5 to 49.5% and 23.0% for 30 min, repectively. Glucose, fructose and sucrose increased to 24.6% and 50.3%, respectively. Hydrolysis of chicory extracts with purified endo-inulinase from Arthrobacter sp. S37 was carried out at $40^{\circ}C$ and pH 7.5 for 44 hrs. The content of high DP($DP{\geq}6$) in total sugar decreased from 83.5 to 23.0% and that of inulobiose(F2) and DP 3-5 increased to 66.1%. Glucose, fructose and sucrose were not produced. The hydrolysis of chicory extracts without DP 1 and DP 2 with crude or with purified enzyme were also carried out. In contrast to the hydrolysate of crude enzyme, that of purified endo-inulinase did not contain glucose, fructose, sucrose, F2 and 1-kestose(GF2). The content of oligosaccharides in the hydrolysate of the purified endo-inulinase were 79.2%, composed mainly of inulotriose(F3), inulotetraose(F4) and inulopentaose(F5), which shows that the enzymatic hydrolysis using purified endo-inulinase from Arthrobacter sp. S37 is the best method for oligosaccharides production from inulin in chicory extracts.

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