• 제목/요약/키워드: gate ways

검색결과 34건 처리시간 0.029초

Arm Short 보호 기능을 포함한 다기능 IGBT GATE DRIVER (Multi Function IGBT Gate Driver Including Arm Short Protection)

  • 이경복;조국춘;최종묵
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2000년도 춘계학술대회 논문집
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    • pp.202-209
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    • 2000
  • This paper introduces the main function and protection method of IGBT gate driver that designed by KOROS. Recently, the applications of insulated gate bipolar transistors(IGBTs) have expanded widely, particularly in the area of railway converters. This driver is suitable for railway traction applications, so they are designed for circumstance of railway vehicle such as vibration. The input control power for this driver is supplied from battery charger of railway. it is no necessary an isolated power supply board or auxiliary power supply, with substantial savings in cost and space in railway applications. This gate driver can be used wide range of input voltage. So, performance of the driver has no relation with the battery voltage(70V∼110V). The protection methods of IGBT gate driver have many kind of ways, but this gate driver it designed to apply to converter for railway system, so this gate driver includes protection for arm short current and low control power voltage, etc. And the process of protection method and protection reference value are optimized by means of sufficient test with our own facilities.

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신도시 교육환경개선에 관한 연구 -통학로의 안전성 확보를 중심으로- (A study on improvement of walking safety in newtown schoolzone way)

  • 윤용기
    • 교육녹색환경연구
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    • 제10권1호
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    • pp.53-63
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    • 2011
  • The purpose of this study is to suggest a scheme to provide children safer and more comfortable walking circumstances by survey current walking circumstances of schoolzone ways. A scheme suggested in this study was based on the analysis of survey to elementary school in 3 Newtowns(Dongtan, Dongbaek and Gumdan City) and actually surveyed data on school zone, the scheme can be summed up as follows; First, to avoid pedestrian roads being interrupted and to expend waiting space near schoolzone ways, several measures are needed including fixing roads and building additional gateway. Second, pedestrian crossings in front of school gate should be located at least 30m away from the left side of the gate. Third, to secure pedestrians' safety in school zone ways should be planed and established more security concepts und facilities.

어린이 보호구역내 통학로의 보행환경에 관한 연구 -구미시 초등학교를 중심으로- (A Study on walking circumstance of school zone way -In Gumi city elementary school-)

  • 안희욱;이재림
    • 교육녹색환경연구
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    • 제8권2호
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    • pp.12-21
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    • 2009
  • The purpose of this study is to suggest a scheme to provide children safer and more comfortable walking circumstances by survey current walking circumstances of school zone ways. First, to avoid pedestrian roads being interrupted and to expand waiting space near school zone ways, several measures are needed including fixing roads, using schools' unemployed spaces and building additional gateway. Second, pedestrian crossings in front of school gate should be located at least 23.16m away from the left side of the gate. Third, on narrow path which cross main streets, the interval of pedestrian signal should be extended as against of the moment. And traffic calming facilities should be built on accurate position. Fourth, to secure pedestrians' safety and field of view, trees lining streets and any obstacles located within 10m from bus stop sign should be removed. Finally, education system about school zone ways should be improved to help children get used to more complicated roads' conditions.

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SoC Emulation in Multiple FPGA using Bus Splitter

  • Wooseung Yang;Lee, Seung-Jong;Ando Ki;Kyung, Chong-Min
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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    • pp.859-862
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    • 2003
  • This paper proposes an emulation environment for SoC designs using small number of large gate-count FPGA's and a PC system. To overcome the pin limitation problem in partitioning the design when the design size overwhelms the FPGA gate count, we use bus splitter modules that replicate on-chip bus signals in one FPGA to arbitrary number of other FPGA's with minimal pin count. The proposed scheme is applied to the emulation of 2 million gate multimedia processing chip using two Xilinx Viretex-2 6000 FPGA devices in 6.6MHz operating frequency. An ARM core, memories, camera and LCD display are modeled in software using dual 2GHz Pentium-III processors. This scheme can be utilized for more than 2 FPGA's in the same ways as two FPGA case without losing emulation speed.

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Development of Analysis Module for Marine Traffic Information Using PC Camera

  • Moon Serng-Bae;Lee Geun-Sil;Jun Seung-Hwan
    • 한국항해항만학회지
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    • 제29권4호
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    • pp.313-318
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    • 2005
  • Usually marine traffic survey has been conducted by some methods like an ocular observation using portable RADAR, a questionnaire, etc. But these should have expended a lot of manpower and expenses. In this paper, we have developed new observation module which could capture the RADAR image using PC camera simply, and allowed as to track targets on the PC monitor directly. And it has been programmed to make a database of RADAR image, target's track and information, and analyze the marine traffic tendency in various ways like vessel number crossed over gate line, vessel's velocity distribution in gate line, traffic density distribution, etc. We have confirmed that this module could observe and analyze the marine traffic efficiently and economically through several on-the-spot experiments.

FPGA를 이용한 웨어러블 디바이스를 위한 역전파 알고리즘 구현 (Implementation of back propagation algorithm for wearable devices using FPGA)

  • 최현식
    • 한국차세대컴퓨팅학회논문지
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    • 제15권2호
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    • pp.7-16
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    • 2019
  • 신경 회로망을 구현하기 위해 다양한 시도들이 이루어지고 있으며, 하드웨어적인 개선을 위해 전용 칩 개발이 이루어지고 있다. 이러한 신경 회로망을 웨어러블 디바이스에 적용하기 위해서는 소형화와 저전력 동작이 필수적이다. 이러한 관점에서 적합한 구현 방법은 FPGA (field programmable gate array)를 사용한 디지털 회로 설계이다. 이 시스템을 구현하기 위해서는 성능 향상을 위해 신경 회로망의 많은 부분을 차지하는 학습 알고리즘을 FPGA 내에 구현하여야 한다. 본 논문에서는 FPGA를 이용하여 다양한 학습 알고리즘 중 역전파 알고리즘을 구현하였으며, 구현 된 신경 회로망은 OR 게이트 연산을 통해 검증되었다. 또한 이러한 신경 회로망을 활용하여 다양한 사용자의 생체 신호 측정 결과를 분석할 수 있음을 확인하였다.

Cradle to Gate Emissions Modeling for Scheduling of Construction Projects

  • Sharma, Achintyamugdha;Deka, Priyanka;Jois, Goutam;Jois, Umesh;Tang, Pei
    • 국제학술발표논문집
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    • The 9th International Conference on Construction Engineering and Project Management
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    • pp.975-983
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    • 2022
  • This paper presents an innovative way of integrating scheduling and project controls with the environmental impact of a construction project to track, monitor, and manage environmental emissions at the activity level. As a starting point, scheduling and project controls help monitor the status of a project to provide an assessment of the duration and sequence of activities. Additionally, project schedules can also reflect resource allocation and costs associated with various phases of a construction project. Owners, contractors and construction managers closely monitor tasks or activities on the critical path(s) and/or longest path(s) calculated through network based scheduling techniques. However, existing industry practices do not take into account environmental impact associated with each activity during the life cycle of a project. Although the environmental impact of a project may be tracked in various ways, that tracking is not tied to the project schedule and, as such, generally is not updated when schedules are revised. In this research, a Cradle to Gate approach is used to estimate environmental emissions associated with each activity of a sample project schedule. The research group has also investigated the potential determination of scenarios of lowest environmental emissions, just as project managers currently determine scenarios with lowest cost or time. This methodology can be scaled up for future work to develop a library of unit emissions associated with commonly used construction materials and equipment. This will be helpful for project owners, contractors, and construction managers to monitor, manage, and reduce the carbon footprint associated with various projects.

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INTERCOMM 93 - 범 세계 지능망을 위한 인터 네트워킹

  • Pandurangan G.(Ramani)
    • 국제 전기통신 표준화 소식
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    • 통권27호
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    • pp.202-210
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    • 1993
  • 기업과 무역의 국제화는 시대에 부응하는 요구이며, 원활하고 특징있는 국제 전기통신 서비스의 욕구를 창출하였다. 다양한 국가와 지역의 상이한 환경과 요구조건은 각 국가에서 변경없이 그대로 적용할 수 있는 단일 표준개발을 허용하지 않는다. 조화를 이룬 표준과 완전한 기능의 국제적 관문(gate ways)이 종단대 종단(end-to-end)망 및 서비스 연결성을 제공하는데 결정적인 요소가 되며, 특히 국경을 초월하여 발전하는 세계적인 지능 통신망 서비스와 관련되었을 때 그러하다. 이러한 세계적인 인터네트워킹 서비스에 대한 잠재성은 해결을 요하는 표준 및 정책문제를 제기한다. 현재 많은 표준화 기구가 이러한 작업의 조화를 이루고 시장의 수요에 반응하려는 노력을 진행하고 있음을 알 수 있다.

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드라마 「SKY 캐슬」에 나타난 아버지와 어머니의 문지기 유형 (Types of Parental Gatekeeping in Drama 「SKY Castle」)

  • 이영환
    • 한국콘텐츠학회논문지
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    • 제20권1호
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    • pp.593-604
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    • 2020
  • 본 연구는 드라마 「SKY 캐슬」에 등장하는 두 가족을 대상으로 3차원 문지기 행동(통제-격려-비난)과 문지기 유형을 분석하였다. 이론상으로 가능한 8개의 문지기 유형 중 드라마 「SKY 캐슬」에서 가장 많이 묘사된 전통적 차단자 유형 이다. 드라마의 한서지과 같은 전통적 차단자 유형의 어머니는 자녀양육에 참여하려는 아버지에게 힘든 상황을 만들기도 하지만, 참여에 관심이 없는 강준상과 같은 아버지는 이를 환영할 수 있다. 또한 아버지 차민혁의 강압적이고 독재적 양육에 대항하여 어머니 노승혜는 자녀를 보호하기 위하여 차단 전략을 사용하면서 이혼까지 감행하고자 하였다. 한편 드라마 「SKY 캐슬」의 결말에서는 가족의 갈등이 해결되어가는 과정으로서 촉진적 개방자 문지기유형을 제시하였다. 즉 한서진과 노승혜는 아버지의 참여를 제지하기 보다 격려하고 지지하면서 통제를 효과적으로 사용함으로써 부부가 서로를 모니터링하면서 양육에 함께 참여하는 촉진적 개방자로 변화된 것이다.

전동차 인버터 구동용 전해콘덴서의 신뢰도예측과 수명 연구 (A Study on the Reliability Prediction and Lifetime of the Electrolytic Condenser for EMU Inverter)

  • 한재현;배창한;구정서
    • 한국안전학회지
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    • 제29권1호
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    • pp.7-14
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    • 2014
  • Inverter module, which feeds the converted power to the traction motor for EMU. Consists of the power semiconductors with their gate drive unit(GDU)s and the control computer for driving, voltage, current and speed controls. Electrolytic condenser, connected to the gate drive unit and a core component to drive the power semiconductor, has problems such as reduction in lifetime and malfunction caused by electrical and mechanical characteristic changes from heat generation during high speed switching for generation of stable power. In this study, To check the service life of electrolytic condenser, the test was carried out in two ways. First, In the case of accelerated life testing of condenser, the Arrhenius model is a way of life testing. Another way is to analyze the reliability of the failure data by the method of parametric data analysis. Eventually, life time by accelerated life test than a method of failure data analysis(Weibull distribution) was found to be slightly larger output.