• JSTS:Journal of Semiconductor Technology and Science
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• 제10권2호
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• pp.79-99
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• 2010

Pulsed current-voltage (I-V) methods are introduced to evaluate the impact of fast transient charge trapping on the performance of high-k dielectric transistors. Several pulsed I-V measurement configurations and measurement requirements are critically reviewed. Properly configured pulsed I-V measurements are shown to be capable of extracting such device characteristics as trap-free mobility, trap-induced threshold voltage shift (${\Delta}V_t$), as well as effective fast transient trap density. The results demonstrate that the pulsed I-V measurements are an essential technique for evaluating high-$\kappa$ gate dielectric devices.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2002년도 춘계 기술심포지움 논문집
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• pp.198-202
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• 2002

$HfO_2$films were grown on Si substrate in the temperature range $250~550^{\circ}C$ using metal organic chemical vapor deposition (MOCVD) technique for a gate dielectric. Hafnium tart-butoxide and Oxygen gas were used as precursors and N2 was used as carrier gas. Impurity distribution and film structure(including interfacial layer) were studied at the deposition temperature range between 25$0^{\circ}C$ and $550^{\circ}C$. The growth rate and impurty distribution decreased with increasing temperature. The electrical properties of $HfO_2$were investigated with C-V, 1-V method and showed it has a good properties as a gate dielectric.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.191-191
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• 2010

차세대 디스플레이를 위한 소자로 활용 가능한 Oxide Semiconductor TFT를 bottom gate 타입의 TFT 소자를 제작하였다. 투명 박막 트랜지스터 제작과 관련해서 ITO가 증착된 glass 기판을 gate 전극으로 사용하였고, 게이트 dielectric으로 $SiO_2/Si_3N_4$를 PECVD 방법을 사용해 증착하였으며, 채널 영역으로 ZnO를 RF magnetron sputtering을 이용하여 RF power 및 공정 압력에 따른 구조적, 광학적, 전기적 특성을 조사하였다. ZnO 박막의 공정 변수로 RF파워는 25W, 50W, 75W, 100W로 변화시키고, 증착 압력은 20m, 100m, 200m 300mTorr로 변화시켰다. Source/Drain 사이에 채널 형성 및 게이트 dielectric에서 누설전류가 TFT 특성에 미치는 영향을 연구하였다. ZnO 박막은 증착 파워 및 공정 압력에 따라 박막의 결정성이 현저하게 변화하는 것을 알 수 있었으며, 그러한 박막의 미세구조 가 TFT의 전기적인 특성에 크게 영향을 미치는 것으로 판단된다

• 한국정보통신학회논문지
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• 제7권5호
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• pp.863-871
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• 2003

본 논문에서는 pHEMT의 게이트 전압을 제어하여 저 위상잡음과 고 안정 특성을 나타내는 Ku-band위상 동기유전체공진 발진기를 설계하였다. 발진기를 설계에서 위상잡음에 영향을 주는 P-HEMT의 비선형소자를 선정하고 게이트 전압에 따라 최소 위상잡음을 나타내도록 최적화 시켰으며 바이어스에 따른 산란계수를 이용하여 전압제어 마이크로파 발진기를 설계한 후 안정특성을 위하여 위상동기회로를 적용하였다. 디지털마이크로파 통신시스템에 이용되는 10.75GHz의 주파수에서 동작되는 고안정 위상동기발진기는 전치분주기 형태로 제작하였으며 설계된 마이크로파 발진기는 9.17dBm 출력전력과 -88 dBc/Hz @10KHz의 위상잡음 특성을 나타내었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.190-193
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• 2002

The processing technology of organic thin-film transistors (Ons) performances have improved fur the last decade. Gate insulator layer has generally used inorganic layer, such as silicon oxide which has properties of a low electrical conductivity and a high breakdown field. However, inorganic insulating layers, which are formed at high temperature, may affect other layers termed on a substrate through preceding processes. On the other hand, organic insulating layers, which are formed at low temperature, dose not affect pre-process. Known wet-processing methods for fabricating organic insulating layers include a spin coating, dipping and Langmuir-Blodgett film processes. In this paper, we propose the new dry-processing method of organic gate dielectric film in field-effect transistors. Vapor deposition polymerization (VDP) that is mainly used to the conducting polymers is introduced to form the gate dielectric. This method is appropriate to mass production in various end-user applications, for example, flat panel displays, because it has the advantages of shadow mask patterning and in-situ dry process with flexible low-cost large area displays. Also we fabricated four by four active pixels with all-organic thin-film transistors and phosphorescent organic light emitting devices.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권3호
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• pp.213-225
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• 2002

Metal-Ferroelectric- Insulator- Silicon (MFIS) structured field effect transistor (FET) device was fabricated and characterized. Important issues to realize ferroelectric gate field effect transistor device were summarized in three sections. The choice of interlayer dielectric was made in the consideration of device functionality and chemical reaction between ferroelectric materials and silicon surface during fabrication process. Also, various ferroelectric thin film materials were taken into account to meet desired memory window and process compatibility. Finally, MFIS structured FET device was fabricated and important characteristics were discussed. For feasible integration of current device as random access memory array cell address schemes were also suggested.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.1081-1084
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• 2003

Structural morphology, annealing behavior and dielectric properties of polyaniline-emeraldine base (Pani-EB) and poly methyl methacrylate (PMMA) thin films prepared by spin coating technique have been studied. MIM and MISM structures were used to investigate annealing and dielectric behavior. The XRD and AFM spectrum of as grown and annealed thin films indicates the amorphous nature. The observed amorphous phase, low loss, dielectric behavior and thermal stability even at high temperatures implies the feasibility of utilizing PMMA and Pani-EB thin films as gate dielectric insulator layer in organic thin film transistors which can find application in flat panel display.

• Journal of Information Display
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• 제11권3호
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• pp.95-99
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• 2010

A series of new dielectric polymers with phenyl, epoxy, and carboxylicacid functional groups was prepared via free-radical polymerization. The effect of such dielectric polymers with various functional groups on the performance of OTFT was investigated. The nonpolar groups of terpolymer made the surface of the dielectric layer more hydrophobic and improved the crystal growth of pentacene on the gate insulator, resulting in higher mobility. By controlling the functional group, the electric characteristics of OTFT performance was varied, with $0.00017-0.15\;cm^2/V{\cdot}s$ mobility.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 추계학술대회 논문집 Vol.16
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• pp.144-147
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• 2003

Cu+ ions drift diffusion in formal oxide film and SiOCH film for interlayer dielectric is evaluated. The diffusion is investigated by measuring shift in the flatband voltage of capacitance/voltage measurements on Cu gate capacitors after bias temperature stressing. At a field of 0.2MV/cm and temperature $200^{\circ}C,\;300^{\circ}C,\;400^{\circ}C,\;500^{\circ}C$ for 10min, 30min, 60min. The Cu+ ions drift rate of $SiOCH(k=2.85{\pm}0.03)$ film is considerable lower than termal oxide. As a result of the experiment, SiOCH film is higher than Thermal oxide film for Cu+ drift diffusion resistance. The important conclusion is that SiOCH film will solve a causing reliability problems aganist Cu+ drift diffuion in dielectric materials.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.45-49
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• 2001

We have investigated physical and electrical properties of the Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin film for alternative gate dielectrics in the metal-oxide-semiconductor device. The oxidation of Hf deposited directly on the Si substrate results in the H $f_{x}$/ $O_{y}$ interfacial layer and the high-k Hf $O_2$film simultaneously. Interestingly, the post-oxidation N2 annealing of the H102/H1Si70y thin films reduces(increases) the thickness of an amorphous HfS $i_{x}$/ $O_{y}$ layer(Hf $O_2$ layer). This phenomenon causes the increase of the effective dielectric constant, while maintaining the excellent interfacial properties. The hysteresis window in C-V curves and the midgap interface state density( $D_{itm}$) of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin films less than 10 mV and ~3$\times$10$^{11}$ c $m^{-2}$ -eV without post-metallization annealing, respectively. The leakage current was also low (1$\times$10-s A/c $m^2$ at $V_{g}$ = +2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfS $i_{x}$/ $O_{y}$ buffer layer. We also investigated the charge trapping characteristics using Fowler-Nordheim electron injection: We found that the degradation of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ gate oxides is more severe when electrons were injected from the gate electrode.e electrode.e.e electrode.e.