• Proceedings of the IEEK Conference
• /
• 2008.06a
• /
• pp.409-410
• /
• 2008

This paper presents nonlinear and parallel design for synchronous pipelining in IP-based H.264 decoder implementation. Since H.264 decoder includes the dataflow of feedback loop, the data dependency requires one NOP stage per pipelining latency to drop the throughput into 1/2. Further, it is found that, in execution time, the stage scheduled for MC is more occupied than that for CAVLD/ITQ/DF. The less efficient stage would be improved by nonlinear scheduling, while the fully-utilized stage could be accelerated by parallel scheduling of IP. The optimization yields 3 nonlinear {CAVLD&ITQ}|3 parallel (MC/IP&Rec.)| 3 nonlinear {DF} pipelined architecture for IP-based H.264 decoder. In experiments, the nonlinear and parallel pipelined H.264 decoder, including existing IPs, could deal with full HD video at 41.86MHz, in real time processing.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.31B no.9
• /
• pp.76-84
• /
• 1994

This paper presents a new high-performance VLSI architecture and VLSI implementation for full-search block matching algorithm. The proposed VLSI architecture has the feature of two directional parallel and pipeline processing, thereby reducing the PE idle time at which the direction of block matching operation within the search area is changed. Therfore, the proposed architecture is faster than the existing architectures under the same clock frequency. Based on HSPICE circuit simulation, it is verified that the implemented procesing element is operated successfully within 13 ns for 75 MHz operation.

• Journal of computational fluids engineering
• /
• v.11 no.1 s.32
• /
• pp.43-51
• /
• 2006

A fluid transient analysis on the Koreasat 1 & 2 pipeline system is conducted through numerical parametric studies in which unsteady friction results are compared with quasi-steady friction results and show relatively accurate prediction of the response curve with the unsteady friction. The code developed and used in this analysis has finished verification through comparing with the original Zielke model, the full and recursive convolution model and quasi-steady model as a reference. The unsteady friction is calculated by the recursive convolution Zielke model in which a complete evolution history of velocity field is no longer required so that it makes the fluid transient analysis on the complicated system possible. The results show that the application of quasi-steady friction to model cannot predict the entire response curve properly except the first peak amplitude but the application of unsteady friction to model can predict reasonably the response curve, therefore it is to know the characteristics of the propulsion system.

• 한국전산유체공학회:학술대회논문집
• /
• 2006.05a
• /
• pp.320-323
• /
• 2006

A fluid transient analysis on the Koreasat 1 & 2 pipeline system is conducted through numerical parametric studies in which unsteady friction results are compared with quasi-steady friction results and show relatively accurate prediction of the response curve with the unsteady friction. The code developed and used in this analysis has finished verification through comparing with the original Zielke model, the full and recursive convolution model and quasi-steady model as a reference. The unsteady friction is calculated by the recursive convolution Zielke model in which a complete evolution history of velocity field is no longer required so that it makes the fluid transient analysis on the complicated system possible. The results show that the application of quasi-steady friction to model cannot predict the entire response curve properly except the first peak amplitude but application of unsteady friction to model can predict reasonably he response curve, therefore it is to know the characteristics of the propulsion system.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.12 no.6
• /
• pp.1026-1031
• /
• 2008

Nowdays, homes and small businesses rely more and more PON(Passive Optical Networks) for financial transactions, private communications and even telemedicine. Thus, encryption for these data transactions is very essential due to the multicast nature of the PON In this parer, we presented our implementation of a counter mode AES based on Virtex4 FPGA. Our design exploits three advanced features; 1) Composite field arithmetic SubByte, 2) efficient MixColumn transformation 3) and on-the-fly key-scheduling for fully pipelined architecture. By pipeling the composite field implementation of the S-box, the area cost is reduced to average 17 percent. By designing the on-the-fly key-scheduling, we implemented an efficient key-expander module which is specialized for a pipelined architecture.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2000.05a
• /
• pp.465-469
• /
• 2000

This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer (PADFE) using a 0.25-${\mu}{\textrm}{m}$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stage are inserted into the critical path of the ADFE by using delayed least-mean-square (DLMS) algorithm Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The singl-chip PADFE contains about 205,000 transistors on an area of about 1.96$\times$1.35-$\textrm{mm}^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.37 no.12
• /
• pp.60-69
• /
• 2000

This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer(PADFE) using a 0.25-${\mu}m$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stages are inserted into the critical path of the ADFE by using delayed least-mean-square(DLMS) algorithm. Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width, and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The single-chip PADFE contains about 205,000 transistors on an area of about $1.96\times1.35-mm^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW. Test results show that the fabricated chip works functionally well.

• The KIPS Transactions:PartA
• /
• v.11A no.2
• /
• pp.195-202
• /
• 2004

This paper introduces the design or parallel Pipeline high-speed analog-to-digital converter(ADC) for the high-resolution video applications which require very precise sampling. The overall architecture of the ADC consists of 4-channel parallel time-interleaved 10-bit pipeline ADC structure a]lowing 200MSample/s sampling speed which corresponds to 4-times improvement in sampling speed per channel. Key building blocks are composed of the front-end sample-and-hold amplifier(SHA), the dynamic comparator and the 2-stage full differential operational amplifier. The 1-bit DAC, comparator and gain-2 amplifier are used internally in each stage and they were integrated into single switched capacitor architecture allowing high speed operation as well as low power consumption. In this work, the gain of operational amplifier was enhanced significantly using negative resistance element. In the ADC, a delay line Is designed for each stage using D-flip flops to align the bit signals and minimize the timing error in the conversion. The converter has the power dissipation of 280㎽ at 3.3V power supply. Measured performance includes DNL and INL of +0.7/-0.6LSB, +0.9/-0.3LSB.

• Genomics & Informatics
• /
• v.20 no.4
• /
• pp.44.1-44.13
• /
• 2022

Brugada syndrome (BS) is an autosomal dominant inheritance cardiac arrhythmia disorder associated with sudden death in young adults. Thailand has the highest prevalence of BS worldwide, and over 60% of patients with BS still have unclear disease etiology. Here, we performed a new viral metagenome analysis pipeline called VIRIN and validated it with whole genome sequencing (WGS) data of HeLa cell lines and hepatocellular carcinoma. Then the VIRIN pipeline was applied to identify viral integration positions from unmapped WGS data of Thai males, including 100 BS patients (case) and 100 controls. Even though the sample preparation had no viral enrichment step, we can identify several virus genes from our analysis pipeline. The predominance of human endogenous retrovirus K (HERV-K) viruses was found in both cases and controls by blastn and blastx analysis. This study is the first report on the full-length HERV-K assembled genomes in the Thai population. Furthermore, the HERV-K integration breakpoint positions were validated and compared between the case and control datasets. Interestingly, Brugada cases contained HERV-K integration breakpoints at promoters five times more often than controls. Overall, the highlight of this study is the BS-specific HERV-K breakpoint positions that were found at the gene coding region "NBPF11" (n = 9), "NBPF12" (n = 8) and long non-coding RNA (lncRNA) "PCAT14" (n = 4) region. The genes and the lncRNA have been reported to be associated with congenital heart and arterial diseases. These findings provide another aspect of the BS etiology associated with viral genome integrations within the human genome.

• Genomics & Informatics
• /
• v.3 no.3
• /
• pp.86-93
• /
• 2005

Human brain EST data provide important clues for our understanding of the molecular biology associated with the function of the normal brain and the molecular pathophysiology with brain disorders. To systematically and efficiently study the function and disorders of the human brain, 45,773 human brain ESTs were collected from 27 human brain cDNA libraries, which were constructed from normal brains and brain disorders such as brain tumors, Parkinson's disease (PO) and epilepsy. An analysis of 45,773 human brain ESTs using our EST analysis pipeline resulted in 38,396 high-quality ESTs and 35,906 ESTs, which were coalesced into 8,246 unique gene clusters, showing a significant similarity to known genes in the human RefSeq, human mRNAs and UniGene database. In addition, among 8,246 gene clusters, 4,287 genes ($52\%$) were found to contain full-length cONA clones. To facilitate the extraction of useful information in collected these human brain ESTs, we developed a user-friendly interface system, the Korea Brain Unigene Database (KBUD). The KBUD web interface allows access to our human brain data through three major search modes, the BioCarta pathway, keywords and BLAST searches. Each result when viewed in KBUD offers comprehensive information concerning the analyzed human brain ESTs provided by our data as well as data linked to various other publiC databases. The user-friendly developed KBUD, the first world-wide web interface for human brain EST data with ESTs of human brain disorders as well as normal brains, will be a helpful system for developing a better understanding of the underlying mechanisms of the normal brain well as brain disorders. The KBUD system is freely accessible at http://kugi.kribb.re.kr/KU/cgi -bin/brain. pI.