• 제목/요약/키워드: frequency-to-voltage converter

검색결과 920건 처리시간 0.031초

A Simple Capacitor Voltage Balancing Method with a Fundamental Sorting Frequency for Modular Multilevel Converters

  • Peng, Hao;Wang, Ying;Wang, Kun;Deng, Yan;He, Xiangning;Zhao, Rongxiang
    • Journal of Power Electronics
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    • 제14권6호
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    • pp.1109-1118
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    • 2014
  • A Fundamental Frequency Sorting Algorithm (FFSA) is proposed in this paper to balance the voltages of floating dc capacitors for Modular Multilevel Converters (MMCs). The main idea is to change the sequences of the CPS-PWM carriers according to the capacitor voltage increments during the previous fundamental period. Excessive frequent sorting is avoided and many calculating resources are saved for the controller. As a result, more sub-modules can be dealt with. Furthermore, it does not need to measure the arm currents. Therefore, the communication between the controllers can be simplified and the number of current sensors can be reduced. Moreover, the proposed balancing method guarantees that all of the switching frequencies of the sub-modules are equal to each other. This is quite beneficial for the thermal design of the sub-modules and the lifetime of the power switches. Simulation and experimental results acquired from a 9-level prototype verify the viability of the proposed balancing method.

Design and Evaluation of Cascode GaN FET for Switching Power Conversion Systems

  • Jung, Dong Yun;Park, Youngrak;Lee, Hyun Soo;Jun, Chi Hoon;Jang, Hyun Gyu;Park, Junbo;Kim, Minki;Ko, Sang Choon;Nam, Eun Soo
    • ETRI Journal
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    • 제39권1호
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    • pp.62-68
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    • 2017
  • In this paper, we present the design and characterization analysis of a cascode GaN field-effect transistor (FET) for switching power conversion systems. To enable normally-off operation, a cascode GaN FET employs a low breakdown voltage (BV) enhancement-mode Si metal-oxide-semiconductor FET and a high-BV depletion-mode (D-mode) GaN FET. This paper demonstrates a normally-on D-mode GaN FET with high power density and high switching frequency, and presents a theoretical analysis of a hybrid cascode GaN FET design. A TO-254 packaged FET provides a drain current of 6.04 A at a drain voltage of 2 V, a BV of 520 V at a drain leakage current of $250{\mu}A$, and an on-resistance of $331m{\Omega}$. Finally, a boost converter is used to evaluate the performance of the cascode GaN FET in power conversion applications.

새로운 방식의 단상 인버터를 이용한 태양광 시스템 구현 (A New Solar Energy Conversion System Implemented using Single Phase Inverter)

  • 홍정표;김태화;원태현;권순재;홍순일;김종달
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2006년도 전력전자학술대회 논문집
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    • pp.488-491
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    • 2006
  • In this paper proposed method of maximum power point tracking using boost converter for a connected single phase inverter with photovoltaic system. The maximum power point tracking control is based on generated circuit control MOSFET switch of boost converter and single phase inverter uses predicted current control to control four IGBT's switch in full bridge. The predicted current control provide current with sinusoidal wave shape and inphase with voltage. The generation control circuit allows each photovoltaic module to operate independently at peak capacity, simply by detecting of the output power of the system. Furthermore, the generation control circuit attenuates low-frequency ripple voltage, which is caused by the full-bridge inverter, across the photovoltaic modules. Consequently, the output power of system is increased due to the increase in average power generated by the photovoltaic modules. The effectiveness of the proposed inverter system is confirmed experimentally and by means of simulation.

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불평형 전원 조건에서 MMC 기반 HVDC 시스템 순환전류에 관한 연구 (A Study of Circulating Current in MMC based HVDC System under an Unbalanced Grid Condition)

  • 도원석;김시환;김태진;김래영
    • 전기학회논문지
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    • 제64권8호
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    • pp.1193-1201
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    • 2015
  • This paper presents a study of circulating current of modular multi-level converter (MMC) based a high voltage direct current (HVDC) system under unbalanced grid conditions. Due to the connection of a dependent DC source in each phase, the MMC system inherently generates the power ripple of double-line-frequency components in the AC-side and as a result, the additional sinusoidal current named circulating current flows through the each arm. Reliability improvement of HVDC system under an unbalanced grid condition is one of the important criteria. Generally, the modeling of the circulating current is based on the power relation between DC-side and AC-side. However, the method is not perfectly matched in the MMC system due to the difference of the structural characteristic. In this paper, improved modeling method of circulating current is proposed, which is based on the inner arm power. The proposed method is verified by several simulations to have good agreement of the circulating current components.

랜덤 수 생성 회로를 이용한 EMI Noise 저감 회로 (The EMI Noise Reduction Circuit with Random Number Generator)

  • 김성진;박주현;김상윤;구자현;김형일;이강윤
    • 한국전자파학회논문지
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    • 제26권9호
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    • pp.798-805
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    • 2015
  • 본 논문에서는 랜덤 수 생성 회로를 통해 Relaxation Oscillator의 주파수를 불규칙하게 변환하여 EMI Noise를 최소화하는 방법을 제시한다. 또한, DC-DC Converter에 이 기법이 적용되었을 때의 효과와 이 결과가 RF Receiver system에 미치는 효과를 Noise 측면에서 연구하였다. 제안하는 Relaxation Oscillator 출력 중심주파수는 7.9 MHz이고, 온도보상기법을 적용하여 온도변화에 따라 주파수가 보상되도록 설계하였다. 이 칩은 $0.18{\mu}m$ 공정으로 설계하였고, 칩의 면적은 $220{\mu}m{\times}280{\mu}m$이다. 전류 소모는 공급전압인 1.8 V에서 $500{\mu}A$이다.

단순화된 S-R 래치를 이용한 6비트 CMOS 플래쉬 A/D 변환기 설계 (Design of 6bit CMOS A/D Converter with Simplified S-R latch)

  • 손영준;김원;윤광섭
    • 한국통신학회논문지
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    • 제33권11C호
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    • pp.963-969
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    • 2008
  • 본 논문에서는 무선통신시스템의 수신단에 적용될 수 있는 6비트 100MHz 플래쉬 A/D 변환기를 설계하였다. 제안하는 플래쉬 A/D 변환기는 해상도가 1비트씩 증가함에 따라 2배수로 증가하는 S-R 래치 회로를 단순화하여 집적화 하였다. 기존 NAND 기반의 S-R 래치 회로에 사용되던 8개의 MOS 트랜지스터 숫자를 6개로 줄였으며, 비교단의 동적 소비전력을 최대 12.5%까지 감소되도록 설계하였다. 설계된 A/D 변환기는 $0.18{\mu}m$ CMOS n-well 1-poly 6-metal 공정을 사용하여 제작되었고, 전원 전압 1.8V, 샘플링 주파수 100MHz에서의 전력소모는 282mW이다. 입력 주파수 1.6MHz, 30MHz에서의 SFDR은 각각 35.027dBc, 31.253dBc이며, 4.8비트, 4.2비트의 ENOB를 나타내었다.

Design of a Single-stage Electronic Ballast using a Half-Bridge Resonant Inverter

  • Son, Young-Dae
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • 제11B권3호
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    • pp.104-111
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    • 2001
  • The design procedures and experimental results of a single-stage electronic ballast using half-bridge resonant inverter are presented in this paper. The proposed topology is based on a single-stage ballast which combines a boost converter and a half-bradge series resonant inverter. High power factor is achieved by using the boost semi-stage operating in discontinuous conduction mode and inverter semi-stage operated above resonant frequency to provide zero voltage switching is empolyed to ballast the fluorescent lamp Experimental results from the ballast system with 36W fluorescent

VV-VF 제어에 의한 3상유도전동기의 고효율화 운전에 관한 연구 (The optimal efficiency drives of 3-phase induction motor by VV-VF control)

  • 박민호;설승기
    • 전기의세계
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    • 제30권7호
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    • pp.454-459
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    • 1981
  • The aim of study in this paper is that in a system drive of the converter-inverter fed induction motor, the minimum input power can be maintained by control the voltage and frequency of the motor. In theoretical and experiment results describtion motor efficiency is improved by properly varying the ratio v/f. At lightly load condition, for example its efficiency was improved from 44% to 66% as the ratio of v/f varied from 1 to 0.57.

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슬립적환에 의한 유도전동기의 최적효과 차전에 관한 연구 (The Optimal Efficiency Drive of an Induction Motor by Slip Feedback)

  • 박민호;설승기;김흥근;정승기
    • 대한전기학회논문지
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    • 제32권3호
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    • pp.90-98
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    • 1983
  • The method to improve the efficiency of a slightly loaded induction motor is suggested. It is based upon the optimal efficiency slip tracking by adjusting the voltage to frequency ratio(V/f). It is adopted the converter-inverter fed induction motor drive system. All the control loops are implemented bh the Z-80 microprocessor. By this method, 10% or more improvement is achieved at a few fraction of the full load.

Estimating Stability of MTDC Systems with Different Control Strategy

  • Nguyen, Thai-Thanh;Son, Ho-Ik;Kim, Hak-Man
    • Journal of Electrical Engineering and Technology
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    • 제10권2호
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    • pp.443-451
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    • 2015
  • The stability of a multi-terminal direct current (MTDC) system is often influenced by its control strategy. To improve the stability of the MTDC system, the control strategy of the MTDC system must be appropriately adopted. This paper deals with estimating stability of a MTDC system based on the line-commutated converter based high voltage direct current (LCC HVDC) system with an inverter with constant extinction angle (CEA) control or a rectifier with constant ignition angle (CIA) control. In order to evaluate effects of two control strategies on stability, a MTDC system is tested on two conditions: initialization and changing DC power transfer. In order to compare the stability effects of the MTDC system according to each control strategy, a mathematical MTDC model is analyzed in frequency domain and time domain. In addition, Bode stability criterion and transient response are carried out to estimate its stability.