• ETRI Journal
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• v.33 no.6
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• pp.849-856
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• 2011

This research introduces three new fractal array configurations that have superior performance over the well-known Sierpinski fractal array. These arrays are based on the fractal shapes Dragon, Twig, and a new shape which will be called Flap fractal. Their superiority comes from the low side lobe level and/or the wide angle between the main lobe and the side lobes, which improves the signal-to-intersymbol interference and signal-to-noise ratio. Their performance is compared to the known array configurations: uniform, random, and Sierpinski fractal arrays.

• ETRI Journal
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• v.38 no.6
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• pp.1135-1144
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• 2016

Fractal antenna arrays are geometry-based thinned arrays having multiband applications. The major challenge of these arrays is their large number of elements at higher expansion factors. This article presents the thinning of fractal antenna arrays while maintaining an appropriate balance between the side lobe level and beam width by using various quantized fractal distribution functions. A 2D square fractal antenna array and 3DSierpinski gasket antenna array are considered in this article to validate the proposed distribution functions. Nearly one third of the antenna elements are thinned in each successive iteration except in the case of a one-count distribution function. The proposed technique can simplify practical implementation and exhibits better performance for various parameters such as the side lobe level, side lobe angle, and half power beam width than fully populated fractal antenna arrays.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.05a
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• pp.265-268
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• 2001

In this paper, we designed one-dimensional VLSI array with high speed processing in Fractal image compression. fractal image compression algorithm partitions the original image into domain blocks and range blocks then compresses data using the self similarity of blocks. The image is partitioned into domain block with 50% overlapping. Domain block is reduced by averaging the original image to size of range block. VLSI array is trying to search the best matching between a range block and a large amount of domain blocks. Adjacent domain blocks are overlapped, so we can improve of each block's processing speed using the reuse of the overlapped data. In our experiment, proposed VLSI array has about 25% speed up by adding the least register, MUX, and DEMUX to the PE.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.4B
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• pp.708-714
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• 2000

In this paper, an one-dimensional VLSI array for high speed processing of fractal image compression algorithm based the quad-tree partitioning method is proposed. First of all, the single assignment code algorithm is derived from the sequential Fisher's algorithm, and then the data dependence graph(DG) is obtained. The two-dimension array is designed by projecting this DG along the optimal direction and the one-dimensional VLSI array is designed by transforming the obtained two-dimensional array. The number of Input/Output pins in the designed one-dimensional array can be reduced and the architecture of process elements(PEs) can he simplified by sharing the input pins of range and domain blocks and internal arithmetic units of PEs. Also, the utilization of PEs can be increased by reusing PEs for operations to the each block-size. For fractal image compression of 512X512gray-scale image, the proposed array can be processed fastly about 67 times more than sequential algorithm. The operations of the proposed one-dimensional VLSI array are verified by the computer simulation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.5A
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• pp.702-708
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• 2000

In this paper, we designed one-dimensional VLSI array with optimal pipeline period for high speed processing fractal image compression. The algorithm is derived which is suitable for VLSI array from axed block partition algorithm. Also the algorithm satisfies high quality of image and high compression-ratio. The designed VLSI array has optimal pipeline relied because the required processing time of PEs is distributed as same as possible. As this result, we can improve the processing speed up to about 3 times. The number of input/output pins can be reduced by sharing the input/output and arithmetic unit of the domain blocks and the range blocks.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.3
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• pp.170-176
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• 2017

In this paper, we proposed the miniaturized structure of the Log-Periodic Dipole Array(LPDA) antenna for PS-LTE(Pubic Safety-Long Term Evolution) service. The length of array dipole was shortened by adding a fractal tree element with iteration to the array dipole to miniaturize the LPDA antenna. As the result, the proposed LPDA antenna was reduced up to 25 %, compared a typical LPDA antenna. To validation of the proposed LPDA antenna specification, the proposed LPDA antenna is fabricated using aluminum with 1.5 mm thickness and performances are measured. Comparison between simulation result and experiment shows good agreement.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.3
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• pp.220-227
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• 2002

An one-dimensional VLSI array for high speed processing of Fractal image compression was designed. Using again the overlapped input data of adjacent domain blocks in the existing one-dimensional VLSI array, we can save the number of total input for the operations, and so we can save the total computation time. In the design procedure, we considered the data dependences between the input data, reordered the input data to the array, and designed the processing elements. Registers and multiplexors are added for the storing and routing of the input data in some processing elements. Consequently as adding a little hardware, this design shows (N-4B)/4(N-B) times of speed-up compared with the existing array, where N is image size and B is block size.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.28 no.6D
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• pp.905-913
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• 2008

Recently, concrete tracks are introduced into high-speed railroads as an alternative to ballast tracks. Concrete tracks are superior to ballast tracks in the aspect of durability, maintenance and safety. However, deteriorated stiffness of railroad bed and settlement of soft ground induced by trapped or seepage water lead to problems in safety of train operation. In this research, flexural rigidity of concrete tracks was employed as an index of track displacement and a new seismic technique called FRACTAL (Flexural-Rigidity Assessment of Concrete Tracks by Antisymmetric Lamb Waves) method was proposed to delineate flexural rigidity of concrete tracks in a 2-D image. In this paper, to establish theoretical background, parametric research was performed using numerical simulations of stress-wave tests at concrete tracks. Feasibility of the FRACTAL technique was proved at a real concrete track for Korean high-speed trains. Validity of the FRACTAL technique was also verified by comparing the results of impulse-response tests performed at the same measurement array and the results of DC resistivity survey performed at a shoulder nearby the track.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.9
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• pp.921-932
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• 2010

This paper presents a dual-band array antenna based on a modified Sierpinski fractal structure. Array structure is mirror symmetric, and forms broadside radiation pattern for dual frequency band if the ports are fed with $180^{\circ}C$ phase difference between upper and lower $2{\times}1$ array. To use in-phase corporate feeding circuit, the phase inversion structure is designed by changing the position of patch and ground for upper and lower array. The dimensions of the array antenna is $28{\times}30{\times}5\;cm^3$ and the bandwidth of 855~1,380 MHz(47 %), 1,770~2,330 MHz(27 %) were achieved for -10 dB return loss. The measured gain is 9.06~12.44 dBi for the first band and 11.76~14.84 dBi for the second band. The half power beam width is $57^{\circ}$ for x-z plane and $46^{\circ}$ for y-z plane at 1,100 MHz and $43^{\circ}$ and $28^{\circ}$ at 2,050 MHz, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.3
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• pp.440-444
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• 2002

A microstrip patch antenna with circular polarization based on the Sierpinski fractal geometry is proposed. The Sierpinski fractal is composed of 3 equilaterial triangular patch and is easy to produce a circular polarization by sequentially rotation techniques. The characteristics of a 1x3 antenna array from Sierpinski geometry are investigated, i.e. port isolation and AR(axial Ratio).