• Title/Summary/Keyword: formal model

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A Study of the Model-based Testing for Embedded Software in ESTEREL (ESTEREL 임베디드 소프트웨어를 위한 모델 기반 테스트 기법 연구)

  • YANG Jin-Seok;Kim Jin-Hyun;Sim Jae-Hwan;Kim chang-jin;Choi Jin-Young
    • Proceedings of the Korean Information Science Society Conference
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    • 2005.11b
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    • pp.337-339
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    • 2005
  • 본 논문에서는 임베디드 시스템의 제어를 위해 동기화 언어인 에스테렐로 개발된 소프트웨어가 소프트웨어 요구사항을 만족하는지 확인하기 위한 Model-based Test(MBT) 프레임 워크를 제안한다. 제안된 프레임 워크를 기반으로 작성한 프로토 타입의 테스트 도구는 요구사항 모델을 창조하여 On-the-fly 방법을 통해 테스트 케이스를 랜덤하게 자동으로 생성하여 소프트웨어에 대하 테스트를 자동으로 수행한다. 간단한 case study로 레고 마인드스톰 로봇 제어 소프트웨어에 MBT를 수행하고 그 결과를 확인한다.

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System of Systems Approach to Formal Modeling of CPS for Simulation-Based Analysis

  • Lee, Kyou Ho;Hong, Jeong Hee;Kim, Tag Gon
    • ETRI Journal
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    • v.37 no.1
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    • pp.175-185
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    • 2015
  • This paper presents a system-of-systems (SoS) approach to the formal modeling of a cyber-physical system (CPS) for simulation-based analysis. The approach is based on a convergence technology for modeling and simulation of a highly complex system in which SoS modeling methodology, hybrid systems modeling theory, and simulation interoperation technology are merged. The methodology maps each constituent system of a CPS to a disparate model of either continuous or discrete types. The theory employs two formalisms for modeling of the two model types with formal specification of interfaces between them. Finally, the technology adapts a simulation bus called DEVS BUS whose protocol synchronizes time and exchange messages between subsystems simulation. Benefits of the approach include reusability of simulation models and environments, and simulation-based analysis of subsystems of a CPS in an inter-relational manner.

On a Design Verification of the Pipelined Digital System Using SMV (SMV를 이용한 Pipeline 시스템의 설계 검증)

  • 이승호;이현룡;장종건
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.939-942
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    • 2003
  • Design verification problem is emerging as an important issue to detect any design errors at the early stage of the design. Conventionally, design verifications have been done using a simulation technique. However, this technique has been proved not to cover all potential design errors. Therefore, formal technique is often used to verify digital circuits as an alternative. In this paper we adopted formal verification technique and verified some important properties derived from our pipelined digital systems, using SMV (Symbolic Model Verifier). Our example shows that model checking method (one of formal verification techniques) can be effectively performed in verifying the large digital systems.

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Formal Verification of Twin Clutch Gear Control System

  • Muhammad Zaman;Amina Mahmood;Muhammad Atif;Muhammad Adnan Hashmi;Muhammad Kashif;Mudassar Naseer
    • International Journal of Computer Science & Network Security
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    • v.24 no.3
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    • pp.151-159
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    • 2024
  • Twin clutch model enables the power-shifts as conventional planetary automatic transmission and eradicates the disadvantages of single clutch trans- mission. The automatic control of the dual clutches is a problem. Particularly to control the clutching component that engages when running in one direction of revolution and disengages when running the other direction, which exchange the torque smoothly during torque phase of the gearshifts on planetary-type automatic transmissions, seemed for quite a while hard to compensate through clutch control. Another problem is to skip gears during multiple gearshifts. However, the twin clutch gear control described in ["M Goetz, M C Levesley and D A Crolla. Dynamics and control of gearshifts on twin clutch transmissions, Proceedings of the Institution of Mechanical Engineers, Part D: Journal of Automobile Engineering 2005"], a significant improvement in twin clutch gear control system is discussed. In this research our objective is to formally specify the twin clutch gear control system and verify it with the help of formal methods. Formal methods have a high potential to give correctness estimating techniques. We use UPPAAL for formal specification and verification. Our results show that the twin clutch gear control model partially fulfills its functional requirements.

Applying Methodology for the Safety-Critical S/W Development of Railway Signaling with the Z and Statechart Formal Method (Z와 Statechart에 의한 열차제어시스템 바일탈 소프트웨어 개발 방법 분석)

  • Jo, Hyun-Jeong;Hwang, Jong-Gyu;Yoon, Yong-Ki
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.57 no.2
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    • pp.65-71
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    • 2008
  • Recently, many critical control systems are developed using formal methods. When software applied to such systems is developed, the employment of formal methods in the software requirements specification and verification will provide increased. assurance for such applications. Earlier error of overlooked requirement specification can be detected using formal specification method. Also the testing and full verification to examine all reachable states using model checking to undertake formal verification are able to be completed. In this paper, we propose an eclectic approach to incorporate Z(Zed) formal language and 'Statemate MAGNUM' which is formal method tools using Statechart for applying to the railway signaling systems.

A Study on the didactical phenomenology of the negative numbers (음수의 교수 현상학적 연구)

  • 우정호;최병철
    • Journal of Educational Research in Mathematics
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    • v.13 no.1
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    • pp.25-55
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    • 2003
  • In the school mathematics, the negative numbers have been instructed by means of intuitive models(concrete situation models, number line model, colour counter model), inductive-extrapolation approach, and the formal approach using the inverse operation relations. These instructions on the negative numbers have caused students to have the difficulty in understanding especially why the rules of signs hold. It is due to the fact that those models are complicated, inconsistent, and incomplete. So, students usually should memorize the sign rules. In this study we studied on the didactical phenomenology of the negative numbers as a foundational study for the improvement of teaching negative numbers. First, we analysed the formal nature of the negative numbers and the cognitive obstructions which have showed up in the historic-genetic process of them. Second, we investigated what the middle school students know about the negative numbers and their operations, which they have learned according to the current national curriculum. The results showed that the degree they understand the reasons why the sign rules hold was low Third, we instructed the middle school students about the negative number and its operations using the formal approach as Freudenthal suggest ed. And we investigated whether students understand the formal approach or not. And we analysed the validity of the new teaching method of the negative numbers. The results showed that students didn't understand the formal approach well. And finally we discussed the directions for improving the instruction of the negative numbers on the ground of these didactical phenomenological analysis.

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Incremental Model-based Test Suite Reduction with Formal Concept Analysis

  • Ng, Pin;Fung, Richard Y.K.;Kong, Ray W.M.
    • Journal of Information Processing Systems
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    • v.6 no.2
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    • pp.197-208
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    • 2010
  • Test scenarios can be derived based on some system models for requirements validation purposes. Model-based test suite reduction aims to provide a smaller set of test scenarios which can preserve the original test coverage with respect to some testing criteria. We are proposing to apply Formal Concept Analysis (FCA) in analyzing the association between a set of test scenarios and a set of transitions specified in a state machine model. By utilizing the properties of concept lattice, we are able to determine incrementally a minimal set of test scenarios with adequate test coverage.

Formal Verification of Embedded Java Program (임베디드 자바 프로그램의 정형 검증)

  • Lee, Tae-Hoon;Kwon, Gi-Hwon
    • The KIPS Transactions:PartD
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    • v.12D no.7 s.103
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    • pp.931-936
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    • 2005
  • There may be subtle errors in embedded software since its functionality is very complex. Thus formal verification for detecting them is very needed. Model checking is one of formal verification techniques, and SLAM is a well-known software model checking tool for verifying safety properties of embedded C program. In this paper, we develop a software model checker like SLAM for verifying embedded Java program Compared to SLAM, our tool allows to verify liveness properties as well as safety ones. As a result, we verify some desired properties in embedded Java program for controlling REGO robot.

The Verification and Retrieval Method for selection of Compatible Object Model (객체 모델 선택을 위한 검증 및 검색방법)

  • Lim, Myung-Jae;Kwon, Young-Man;Kang, Jeong-Jin
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.9 no.5
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    • pp.169-174
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    • 2009
  • In this paper, We define convert rules objects and relation presented in object model to the state and operation domain in formal specification. we implement simulation tool in order to verification method of formal specification and to consistency verified model between user's requirement. It is possible to select the suitable model and reduce the costs and efforts on software development.

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Applying Formal Methods to Modeling and Analysis of Real-time Data Streams

  • Kapitanova, Krasimira;Wei, Yuan;Kang, Woo-Chul;Son, Sang-H.
    • Journal of Computing Science and Engineering
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    • v.5 no.1
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    • pp.85-110
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    • 2011
  • Achieving situation awareness is especially challenging for real-time data stream applications because they i) operate on continuous unbounded streams of data, and ii) have inherent realtime requirements. In this paper we showed how formal data stream modeling and analysis can be used to better understand stream behavior, evaluate query costs, and improve application performance. We used MEDAL, a formal specification language based on Petri nets, to model the data stream queries and the quality-of-service management mechanisms of RT-STREAM, a prototype system for data stream management. MEDAL's ability to combine query logic and data admission control in one model allows us to design a single comprehensive model of the system. This model can be used to perform a large set of analyses to help improve the application's performance and quality of service.