• Journal of Biomedical Engineering Research
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• v.27 no.4
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• pp.154-163
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• 2006

A 64-channel magnetocardiogram (MCG) system using low-noise superconducting quantum interference device (SQUID) planar gradiometers was developed for the measurements of cardiac magnetic fields generated by the heart electric activity. Owing to high flux-to-voltage transfers of double relaxation oscillation SQUID (DROS) sensors, the flux-locked loop electronics for SQUID operation could be made simpler than that of conventional DC SQUIDs, and the SQUID control was done automatically through a fiber-optic cable. The pickup coils are first-order planar gradiometers with a baseline of 4 em. The insert has 64 planar gradiometers as the sensing channels and were arranged to measure MCG field components tangential to the chest surface. When the 64-channel insert was in operation everyday, the average boil-off rate of the dewar was 3.6 Lid. The noise spectrum of the SQUID planar gradiometer system was about 5 fT$_{rms}$/$\checkmark$Hz at 100 Hz, operated inside a moderately shielded room. The MCG measurements were done at a sampling rate of 500 Hz or 1 kHz, and realtime display of MCG traces and heart rate were displayed. After the acquisition, magnetic field mapping and current mapping could be done. From the magnetic and current information, parameters for the diagnosis of myocardial ischemia were evaluated to be compared with other diagnostic methods.

• Progress in Superconductivity
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• v.4 no.2
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• pp.127-131
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• 2003

We have designed and measured an SFQ(Single Flux Quantum) OR gate for a superconducting ALU (Arithmetic Logic Unit). To optimize the circuit, we used WRspice, XIC and Lmeter for simulations and layouts. The OR gate was consisted of a Confluence Buffer and a D Flip-Flop. When a pulse enters into the OR gate, the pulse does not propagate to the other input port because of the Confluence Buffer. A role of D Flip-Flip is expelling the data when the clock is entered into D Flip-Flop. For the measurement of the OR gate operation, we attached three DC/SFQs, three SFQ/DCs and one RS Flip -Flop to the OR gate. DC/SFQ circuits were used to generate the data pulses and clock pulses. Input frequency of 10kHz and 1MHzwere used to generate the SFQ pulses from DC/SFQ circuits. Output data from OR gate moved to RS flip -Flop to display the output on the oscilloscope. We obtained bias margins of the D Flip -Flop and the Confluence Buffer from the measurements. The measured bias margins $\pm$38.6% and $\pm$23.2% for D Flip-Flop and Confluence Buffer, respectively The circuit was measured at the liquid helium temperature.

• Progress in Superconductivity
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• v.5 no.1
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• pp.13-16
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• 2003

In this work, we have studied about an RSFQ (Rapid Single Flux Quantum) switch element. The circuit was designed, simulated, and laid out for mask fabrication. The switch cell was composed of a D flip-flop, a splitter, a confluence buffer, and a switch core. The switch core determined if the input data could pass to the output. “On” and o“off” controls in the switch core could be possible by utilizing an RS flip-flop. When a control pulse was input to the “on” port, the RS flip-flop was in the set state and passed the input pulses to the output port. When a pulse was input to the “off” port, the RS flip-flop was in the reset state and prevented the input pulses from transferring to the output port. We simulated and optimized the switch element circuit by using Xic, WRspice, and Julia. The minimum circuit margins in simulations were more than $\pm$20%. We also performed the mask layout of the circuit by using Xic and Lmeter.

• Progress in Superconductivity
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• v.6 no.1
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• pp.7-12
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• 2004

Due to the very fast switching speed of Josephson junctions, superconductive digital circuit has been a very good candidate fur future electronic devices. High-speed and Low-power microprocessor can be developed with Josephson junctions. As a part of an effort to develop superconductive microprocessor, we have designed an RSFQ 4-bit ALU (Arithmetic Logic Unit) in a pipelined structure. To make the circuit work faster, we used a forward clocking scheme. This required a careful design of timing between clock and data pulses in ALU. The RSFQ 1-bit block of ALU used in this work consisted of three DC current driven SFQ switches and a half-adder. We successfully tested the half adder cell at clock frequency up to 20 GHz. The switches were commutating output ports of the half adder to produce AND, OR, XOR, or ADD functions. For a high-speed test, we attached switches at the input ports to control the high-speed input data by low-frequency pattern generators. The output in this measurement was an eye-diagram. Using this setup, 1-bit block of ALU was successfully tested up to 40 GHz. An RSFQ 4-bit ALU was fabricated and tested. The circuit worked at 5 GHz. The circuit size of the 4-bit ALU was 3 mm ${\times}$ 1.5 mm, fitting in a 5 mm ${\times}$ 5 mm chip.

• Progress in Superconductivity and Cryogenics
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• v.7 no.1
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• pp.21-24
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• 2005

The problem of fluctuation-induced digital errors in a rapid single flux quantum (RSFQ) circuit has been very important issue. So in this experiment, we calculated error rate of RSFQ switch in superconductiyity ALU, The RSFQ switch should have a very low error rate in the optimal bias. We prepared two circuits Placed in parallel. One was a 10 Josephson transmission lines (JTLs) connected in series, and the other was the same circuit but with an RSFQ switch placed in the middle of the 10 JTLs. We used a splitter to feed the same input signal to the both circuits. The outputs of the two circuits were compared with an RSFQ XOR to measure the error rate of the RSFQ switch. By using a computerized bit error rate test setup, we measured the bit error rate of 2.18$\times$$10^{12}$ when the bias to the RSFQ switch was 0.398mh that was quite off from the optimum bias of 0.6mA.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.3
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• pp.199-205
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• 2006

Patterned sapphire substrates (PSS) were fabricated by a simple wet etching process with $SiO_2$ stripe masks and a mixed solution of $H_2SO_4$ and $H_3PO_4$. GaN layers were epitaxially grown on the PSS under the optimized 2-step growth condition of metalorganic vapor deposition. During the 1st growth step, GaN layers with triangular cross sections were grown on the selected area of the surface of the PSS, and in the 2nd growth step, the GaN layers were laterally grown and coalesced with neighboring GaN layers. The density of threading dislocations on the surface of the coalesced GaN layer was $2{\sim}4\;{\times}\;10^7\;cm^{-2}$ over the entire region. The epitaxial structure of near-UV light emitting diode (LED) was grown over the GaN layers on the PSS. The internal quantum efficiency and the extraction efficiency of the LED structure grown on the PSS were remarkably increased when compared to the conventional LED structure grown on the flat sapphire substrate. The reduction in TD density and the decrease in the number of times of total internal reflections of the light flux are mainly attributed due to high level of scattering on the PSS.

• Progress in Superconductivity
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• v.6 no.2
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• pp.104-107
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• 2005

We have developed and tested an RSFQ 4-bit Arithmetic Logic Unit (ALU) based on half adder cells and de switches. ALU is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We have simulated the circuit by using Josephson circuit simulation tools in order to reduce the timing problem, and confirmed the correct operation of the designed ALU. We used simulation tools of $XIC^{TM},\;WRspice^{TM}$, and Julia. The fabricated 4-bit ALU circuit had a size of $\3000{\ cal}um{\times}1500{\cal}$, and the chip size was $5{\cal} mm{\times}5{\cal}mm$. The test speeds were 1000 kHz and 5 GHz. For high-speed test, we used an eye-diagram technique. Our 4-bit ALU operated correctly up to 5 GHz clock frequency. The chip was tested at the liquid-helium temperature.

• Progress in Superconductivity
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• v.7 no.2
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• pp.109-113
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• 2006

The Arithmetic Logic Unit (ALU) is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. We have developed and tested an RSFQ multi-bit ALU constructed with half adder unit cells. To reduce the complexity of the ALU, We used half adder unit cells. The unit cells were constructed of one half adder and three de switches. The timing problem in the complex circuits has been a very important issue. We have calculated the delay time of all components in the circuit by using Josephson circuit simulation tools of XIC, $WRspice^{TM}$, and Julia. To make the circuit work faster, we used a forward clocking scheme. This required a careful design of timing between clock and data pulses in ALU. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. The fabricated 1-bit, 2-bit, and 4-bit ALU circuits were tested at a few kilo-hertz clock frequency as well as a few tens giga-hertz clock frequency, respectively. For high-speed tests, we used an eye-diagram technique. Our 4-bit ALU operated correctly at up to 5 GHz clock frequency.

• Nuclear Engineering and Technology
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• v.41 no.4
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• pp.521-530
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• 2009

Neutron science and technology, the utilization of neutron beams for a wide variety of scientific and engineering research ranging from materials and life science to industrial applications, has been one of the key elements of modem science and technology. Currently, the neutron science and technology in Korea is in rapid growth with the operation of the 30 MW High-flux Advanced Neutron Application Reactor (HANARO) at the Korea Atomic Energy Research Institute, which is one of the most powerful nuclear research reactors in the world. Furthermore, a state of the art HANARO cold neutron research facility, which will open a new era for the neutron science and technology in Korea, is expected to become available in 2010. In this paper, the progress of neutron science and technology in Korea is reviewed and its unprecedented new opportunities and challenges in coming years are presented.

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.222-223
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• 2006

In this paper, we manufactured high flux LED module with Through Hole type. and we measured electrical, optical and thermal properties by driving type. LED module was composed with 8*8 arrangement form by using the glass epoxy PCB. Also, we measured the most suitable driving type with static voltage driving type and static current driving type. As a result, the LED Module of static voltage driving type showed high luminance characteristic than the static current driving type by suppling enough bias. However, the static current driving type showed more stable driving properties because of fast decreasing properties about brightness by increasing the surrounding temperature in the static voltage driving type. Also, due to Quantum confined Stark effect from piezoelectric field, the wavelength of bule peak shifted to long wavelength direction by increasing the surrounding temperature in the static voltage driving type.