• Journal of Biomedical Engineering Research
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• v.19 no.3
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• pp.251-260
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• 1998

The Holter monitoring system is a widely used noninvasive diagnostic tool for ambulatory patient who may be at risk from latent life-threatening cardiac abnormalities. In this paper, we design a high performance intelligent holter monitoring system which is characterized by the small-sized and the low-power consumption. The system hardware consists of one-chip microcontroller(68HC11E9), ECG preprocessing circuit, and flash memory card. ECG preprocessing circuit is made of ECG preamplifier with gain of 250, 500 and 1000, the bandpass filter with bandwidth of 0.05-100Hz, the auto-balancing circuit and the saturation-calibrating circuit to eliminate baseline wandering, ECG signal sampled at 240 samples/sec is converted to the digital signal. We use a linear recursive filter and preprocessing algorithm to detect the ECG parameters which are QRS complex, and Q-R-T points, ST-level, HR, QT interval. The long-term acquired ECG signals and diagnostic parameters are compressed by the MFan(Modified Fan) and the delta modulation method. To easily interface with the PC based analyzer program which is operated in DOS and Windows, the compressed data, that are compatible to FFS(flash file system) format, are stored at the flash memory card with SBF(symmetric block format).

• IEMEK Journal of Embedded Systems and Applications
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• v.18 no.1
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• pp.25-30
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• 2023

We propose a method to update DSP (Digital Signal Processor) firmware using USB (Universal Serial Bus) flash drives. The DSP automatically detects USB drives based on an interrupt when the USB drive is inserted into the USB port. The new firmware binary file is found in the mounted USB drive, and the destination address of DSP flash memory is identified for the firmware update writing by investigating the firmware file header. After the new firmware is written to the DSP flash memory, the DSP is reset and rebooted with the newly updated firmware. By employing TI's TMS320F28379D control card with USB ports, we conduct experiments and verify the normal operation of the implemented method.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.3
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• pp.185-192
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• 2017

Due to the characteristics of low power, high durability and high density, NAND flash memory is being heavily used in various type of devices such as USB, SD card, smart phone and SSD. On the other hand, because of another characteristic of flash cell with the limited number of program/erase cycles, NAND flash memory has a short lifetime compared to other storage devices. To overcome the lifetime problem, many researches related to the wear leveling have been conducted. This paper presents a method called a TCB (Tracking Cold Blocks) using more reinforced constraint conditions when classifying cold blocks than previous works. TCB presented in this paper keeps a MCT (Migrated Cold block Table) to manage the enhanced classification process of cold blocks, with which unnecessary migrations of pages can be reduced much more. Through the experiments, we show that TCB reduces the overhead of wear leveling by about 30% and increases the lifetime up to about 60% compared to BET and BST.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.1
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• pp.1-6
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• 2011

We have developed the process of forming one body S-type cantilever probe in the recessed trench for fine-pitched MEMS probe card. The probe (cantilever beam and pyramid tip) was formed using Deep RIE etching and wet etching. The pyramid tip was formed by the wet etching using KOH and TMAH. The process of forming the curved probe was also developed by the wet etching. Therefore, the fabricated probe is applicable for the probe card for DRAM, Flash memory and RF devices tests and probe tip for IC test socket.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.1
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• pp.67-73
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• 2012

After flash memory card(FMC) was manufactured by $B^2it$ process, interfacial reaction of silver bump with thermal stress was studied. To investigate bonding reliability of Ag bump, thermal shock and thermal stress tests were conducted and then examined on the crack between Cu land and Ag bump interface. Diffusion reaction of Ag bump/Cu land interface was analyzed using SEM, EDS and FIB. The Ag-Cu alloy layer due to the interfacial reaction was formed at the Ag/Cu interface. As the diffusivity of Ag ${\rightarrow}$ Cu is faster than Cu ${\rightarrow}$ Ag, a lot of (Cu, Ag) alloy layers were observed at the Cu layer than Ag. These alloy layers contributed to increase the Cu-Ag bonding strength and its reliability.

• KIISE Transactions on Computing Practices
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• v.21 no.10
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• pp.639-644
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• 2015

The capacity of flash-based storage such as Solid State Drive(SSD) and embedded Multi Media Card(eMMC) is ever-increasing because of the needs from the end-users. However, if a flash-based storage crashes, such as during power failure, the flash translation layer(FTL) is responsible for the crash recovery based on the entire flash memory. The recovery time increases as the capacity of the flash-based storages increases. We propose O1FTL with O(1) crash recovery time that is independent of the flash capacity. O1FTL adopts the working area technique suggested for the flash file system and evaluates the design on a real hardware platform. The results show that O1FTL achieves a crash recovery time that is independent of the capacity and the overhead, in terms of I/O performance, and achieves a low P/E cycle.

• Proceedings of the KIEE Conference
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• 2004.05a
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• pp.147-149
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• 2004

Although most of the people have studied English for a long time, their English conversation capability is low. When we provide them portable conversational-type English learners by the application of computer and information process technology, such portable learners can be used to enhance their English conversation capability by their conventional conversation exercises. The core technology to develop such learner is the development of a voice recognition and synthesis module under an embedded environment. This paper deals with voice recognition and synthesis, prototype of the learner module using a DSP(Digital Signal Processing) chip for voice processing, voice playback function, flash memory file system, PC download function using USB ports, English conversation text function by the use of SMC(Smart Media Card) flash memory, LCD display function, MP3 music listening function, etc. Application areas of the prototype equipped with such various functions are vast, i.e. portable language learners, amusement devices, kids toy, control by voice, security by the use of voice, etc.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.12
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• pp.913-917
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• 2009

Flash memories have asymmetric I/O costs for read and write in terms of latency and energy consumption. However, the ratio of these costs is dependent on the type of storage. Moreover, it is becoming more common to use two flash memories on a system as an internal memory and an external memory card. For this reason, buffer cache replacement algorithms should consider I/O costs of device as well as possibility of reference. This paper presents WWCLOCK(Write-Weighted CLOCK) algorithm which directly uses I/O costs of devices along with recency and frequency of cache blocks to selecting a victim to evict from the buffer cache. WWCLOCK can be used for wide range of storage devices with different I/O cost and for systems that are using two or more memory devices at the same time. In addition to this, it has low time and space complexity comparable to CLOCK algorithm. Trace-driven simulations show that the proposed algorithm reduces the total I/O time compared with LRU by 36.2% on average.

• Journal of Korea Multimedia Society
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• v.10 no.8
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• pp.1029-1038
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• 2007

A smart card based on the existing Java card platform executes and installs an application only when the power is supplied for a minute. And preparing for unexpected power outrage, the execution state of an application and all the data that are modified during execution are saved in the heap. This kind of frequent data update of an EEPROM data is a main cause of reducing the life-cycle of a smart card. This is because the smart card has been developed not considering the current situation that the power is always supplied, and by this time it has continuously kept its old architecture. This paper explains the high performance Java card system free power restriction. The system improves not only application saving mechanism, but memory architecture. In special, we deploy RAM for running an applet, as well as EEPROM for downloading an application. Through proposed mechanism, we can find out performance evaluation that the creation speed of an applet and the execution speed of a method increase up to 58% and 33% respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.409-412
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• 2002

In this paper, We present a designe method for the PC User Interface. Also, the system implementation for T33521 is a interface controller of MMC and SSFCD card which operated with limit speed 12Mbit/s in USB Ver.1.1 and under circumstances windows 95, 98 and Mac Os 8.1. Using this controller, we implemented functional design such as automatic reading, memory block read/write, and file property of 8M/16M flash memory and 32M SMC.