• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.326-329
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• 2002

In this paper, we investigated a feasibility of cerium oxide(CeO$_2$) films as a buffer layer of MFIS(metal ferroelectric insulator semiconductor) type capacitor. CeO$_2$ layer were Prepared by two step process of a low temperature film growth and subsequent RTA (rapid thermal annealing) treatment. By app1ying an ultra thin Ce metal seed layer and N$_2$ Plasma treatment, dielectric and interface properties were improved. It means that unwanted SiO$_2$ layer generation was successfully suppressed at the interface between He buffer layer and Si substrate. The lowest lattice mismatch of CeO$_2$ film was as low as 1.76% and average surface roughness was less than 0.7 m. The Al/CeO$_2$/Si structure shows breakdown electric field of 1.2 MV/cm, dielectric constant of more than 15.1 and interface state densities as low as 1.84${\times}$10$\^$11/ cm$\^$-1/eV$\^$-1/. After N$_2$ plasma treatment, the leakage current was reduced with about 2-order.

• Korean Journal of Materials Research
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• v.6 no.9
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• pp.931-936
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• 1996

비휘발성 메모리 소자에의 적용을 위한 SrBi2Ta2O9(SBT)박막이 고순도의 Sr, Bi, Ti 금속타겟을 사용하여 Pt/Ti/SiO2/Si 기판 위에 reactive sputtering 법에 의해 증착되었다. 조성의 영향을 평가하기 위하여 Bi 타겟에 인가되는 전원의 변화와 열처리에 따른 C-F(capacitance-frequency), P-E(polarization-electric field), I-V(current-voltage)등의 전기적 특성이 조사되었다. Bi의 양이 증가함에 따라 Bi layer 구조를 나타내는 (105)회절 피크가 증가하였고 $700^{\circ}C$, 산소분위기에서 1시간 동안 열처리후 Sr과 Bi가 심하게 휘발되었으며 박막의 미세구조는 다공질이 되었다. 이러한 이유로 열처리된 박막의 누설 전류 밀도는 증가하였다. 열처리된 시편의 조성은 거의 화학양론비를 이루었으며 4.5$\mu$C/$\textrm{cm}^2$의 Pr값을 갖는 강유전(ferroelectric)특성을 나타내었다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.5
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• pp.439-444
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• 2005

We investigated the structural and electrical properties of BLT films grown on Si covered with $ZrO_{2}$ buffer layer. The BLT thin film and $ZrO_{2}$ buffer layer were fabricated using a metalorganic decomposition method. The electrical properties of the MFIS structure were investigated by varying thickness of the $ZrO_{2}$ layer. AES and TEM show no interdiffusion and reaction that suppressed using the $ZrO_{2}$ film as a buffer layer The width of the memory window in the C-V curves for the MFIS structure decreased with increasing thickness of the $ZrO_{2}$ layer. It is considered that the memory window width of MFIS is not affected by remanent polarization. Leakage current density decreased by about four orders of magnitude after using $ZrO_{2}$ buffer layer. The results show that the $ZrO_{2}$ buffer layers are prospective candidates for applications in MFIS-FET memory devices.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1631-1633
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• 2000

A study was carried out on the effect of VDF mol%, on the phase transition presented by P(VDF/TrFE) copolymer cast from dimethylformamide(DMF) solution with molar ratios 70/30 and 80/20. The results from dielectric spectrum and differential scanning calorimetry(DSC) showed that the phase transitions from ferroelectric to paraelectric phase(Curie transition) were observed The Curie point slightly has shifted to high temperature with increasing in VDF mol%, however, the melting point has shifted to low temperature.

• Journal of the Korean Ceramic Society
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• v.40 no.1
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• pp.52-61
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• 2003

$SrBi_2Ta_2O_9(SBT)$and$ZrO_2$thin films for MFIS structure(Metal-Ferroelectric-Insulator-Semiconductor) were deposited by RF magnetron sputtering method. In order to investigate the effect of heat treatment of insulator layers and MFIS structure, the insulator layers were heat treated from $550^{circ}C;to; 850^{\circ}C$in conventional furnace or RTA furnace under$O_2$and Ar ambient, respectively. After then, C-V characteristics and leakage current were measured. The capacitor with 20 nm thick $ZrO_2$layer treated at RTA$750^{circ}C;in;O_2$ atmosphere had the largest memory window. The C-V and leakage current characteristics of the$Pt/SBT(260nm)/ZrO_2(20nm)/Si$structure were better than those of$Pt/SBT(260nm)/Si$ structure. These results showed that$ZrO_2$films took a role of buffer layer effectively.

• Korean Journal of Materials Research
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• v.9 no.12
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• pp.1181-1187
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• 1999

PZT(53/47) precursor 1M sols were prepared using a diol based Sol-Gel process, and thin films were deposited by spin coating onto Pt/Ti/$SiO_2$/Si substrates. With a single coating, final film thickness of aproximately 0.9${\mu}m $ was achieved from diol-based PZT sol. Since PZT crystallized in a ferroelectric perovskite phase from an intermediate nonferroelectric pyrochlore phase, the effects of the presence of perovskite PZT seeds on the phase transformation of PZT were investigated. Seeded PZT films were prepared from the seeded PZT 1M sols in which seeds with less than 0.2${\mu}m $ in size and 1wt% were dispersed in n-propanol before mixing with the PZT stock solution. The seeding effects were confirmed by the fact that the formation temperature of perovskite phase decreased by 50$^{\circ}C$ with less than 1wt% seeds.

• Journal of the Korean Ceramic Society
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• v.42 no.2 s.273
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• pp.104-109
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• 2005

To study the role of PbO as the buffer layer, Pt/PZT/PbO/Si with the MFIS structure was deposited on the p-type (100) Si substrate by the r.f. magnetron sputtering with $Pb_{1.1}Zr_{0.53}Ti_{0.47}O_3$ and PbO targets. When PbO buffer layer was inserted between the PZT thin film and the Si substrate, the crystallization of the PZT thin films was considerably improved and the processing temperature was lowered. From the result of an X-ray Photoelectron Spectroscopy (XPS) depth profile result, we could confirm that the substrate temperature for the layer of PbO affects the chemical states of the interface between the PbO buffer layer and the Si substrate, which results in the inter-diffusion of Pb. The MFIS with the PbO buffer layer show the improved electric properties including the high memory window and low leakage current density. In particular, the maximum value of the memory window is 2.0V under the applied voltage of 9V for the Pt/PZT(200 nm, $400^{\circ}C)/PbO(80 nm)/Si$ structures with the PbO buffer layer deposited at the substrate temperature of $300^{\circ}C$.

• Journal of the Korean Ceramic Society
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• v.38 no.6
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• pp.558-567
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• 2001

본 연구에서는 알콕사이드를 전구물질로 하는 졸겔공정을 이용하여 Bi 과잉 12 mol%의 조성인 B $i_4$ $Ti_3$ $O_{12}$ 박막과 B $i_4$ $Ti_{3-x}$T $a_{x}$ $O_{12}$(x=0.1, 0.2, 0.3) 박막을 제조하였다. XPS 분석에 따르면 Ta 치환 x=0.2에서 Bi 4f의 photoemission 곡선이 낮은 결합에너지로 이동하였고 피크 강도가 감소하는 현상이 관측되었다. 이는 x=0.1과 0.2 사이에서 Bi-O 결합이 길어져 인장상태 하에 있었음을 나타내었다. B $i_4$ $Ti_3$ $O_{12}$(BIT) 박막의 유전상수와 유전손실은 100 kHz에서 340, 0.05이었고, B $i_4$ $Ti_{3-x}$T $a_{x}$ $O_{12}$ 박막에서 이들 값은 x=0.1에서 가장 높았으며, 각각 480, 0.13이었다. B $i_4$ $Ti_3$ $O_{12}$ 박막의 잔류분극과 항전계는 1.24$\mu$C/$ extrm{cm}^2$, 31.4 kV/cm 이었으나, Ta 치환 x=0.2에서 이들 값은 각각 19.7$\mu$C/$\textrm{cm}^2$, 49.5 kV/cm 에 이르렀다. 또한, B $i_4$ $Ti_3$ $O_{12}$ 박막의 누설전류 밀도는 ~$10^{-6}$ A/$\textrm{cm}^2$ 정도이었으며, Ta 치환은 누설전류를 감소시켜 Ta 치환 x=0.2 이상에서 BIT 박막에 비해 한 차수 정도 낮아졌다. Ta 치환에 따른 B $i_4$ $Ti_3$ $O_{12}$ 전기 물성에서 변화는 Bi-O 결합에서 관측된 인장상태로의 전이와 연관성이 있었으며, 덧붙여 치환에서 생성된 전자에 의한 정공보상이 이에 영향을 끼쳤다. 정공보상이 이에 영향을 끼쳤다.끼쳤다.

• Journal of the Korean Vacuum Society
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• v.9 no.4
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• pp.373-378
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• 2000

There was a great difference in the formation kinetics of $TiO_2$ and $Bi_2O_3$ on silicon, but the growth of bismuth titanate (BIT) thin film was mainly limited by the formation of $TiO_2$. As a result, the BIT film was easy to be lack of bismuth. The pulse injection metalorganic chemical vapor deposition (MOCVD) process was introduced in order to overcome this problem by recovering the insufficient bismuth content in the film. By this pulse injection method, bismuth content was increased and also the uniform in-depth composition of the film was attained with a abrupt $Bi_4Ti_3O_{12}/Si$ interface. In addition, the crystallinity of $Bi_4Ti_3O_{12}$ thin film prepared by pulse injection process was greatly improved and the leakage current density was lowered by 1/2~1/3 of magnitude. Clockwise hysteresis of C-V was observed and the ferroelectric switching was confirmed for $Bi_4Ti_3O_{12}$ film deposited by pulse injection method.

• Journal of the Korean Ceramic Society
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• v.37 no.11
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• pp.1097-1104
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• 2000

MOD(Metal-Organic-Decomposition)법에 의해 $Y_2$O$_3$버퍼층에 Pt/TiO$_2$/SiO$_2$/Si 기판 위에 제조한 후, 그 표면 위에 졸-겔 방법으로 YMnO$_3$박막을 형성하였다. 기판의 종류와 수화조건 변화가 YMnO$_3$박막의 결정화 거동에 미치는 영향을 고찰하였으며, 또한 $Y_2$O$_3$버퍼층 유.무에 따른 Mn의 산화상태를 확인하고 이에 따른 유전특성 변화를 연구하였다. $Y_2$O$_3$버퍼층을 삽입하지 않고 직접 기판 위에 형성한 YMnO$_3$박막의 결정상은 기판의 종류 및 Rw 변화에 관계없이 orthorhombic 구조임이 확인되었다. 반면, $Y_2$O$_3$버퍼층 위에 형성된 YMnO$_3$박막의 경우에는 Rw($H_2O$/alkoxide mole ratio)가 0~6 범위 내에서 낮아질술고 hexagonal 결정상 성장에 유리하였으며, 또한 Pt(111)/TiO$_2$/SiO$_2$/Si 기판이 Ptd(200)/TiO$_2$/SiO$_2$/Si에 비하여 결정상 형성에 용이하였다. $Y_2$O$_3$버퍼층은 YMnO$_3$결정상 내에서 $Mn^{4+}$ 이온형성을 억제함으로써 누설전류밀도가 크게 감소되는 효과를 주었으며, 동시에 강유전 특성을 지닌 hexagonal 결정상 형성에 유리하게 작용하였다. 결론적으로, $Y_2$O$_3$는 Pt가 코팅된 Si 기판 위에 YMnO$_3$박막 제조시 그 강유전 특성을 향상시켜주는 우수한 버퍼층 재료임을 확인하였다.