• Title/Summary/Keyword: ferro-electric random access memory(FRAM)

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Chemical Mechanical Polishing (CMP) Characteristics of BST Ferroelectric Film by Sol-Gel Method (졸겔법에 의해 제작된 강유전체 BST막의 기계.화학적인 연마 특성)

  • 서용진;박성우
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.53 no.3
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    • pp.128-132
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    • 2004
  • The perovskite ferroelectric materials of the PZT, SBT and BST series will attract much attention for application to ULSI devices. Among these materials, the BST ($Ba_0.6$$Sr_0.4$/$TiO_3$) is widely considered the most promising for use as an insulator in the capacitors of DRAMS beyond 1 Gbit and high density FRAMS. Especially, BST thin films have a good thermal-chemical stability, insulating effect and variety of Phases. However, BST thin films have problems of the aging effect and mismatch between the BST thin film and electrode. Also, due to the high defect density and surface roughness at grain boundarys and in the grains, which degrades the device performances. In order to overcome these weakness, we first applied the chemical mechanical polishing (CMP) process to the polishing of ferroelectric film in order to obtain a good planarity of electrode/ferroelectric film interface. BST ferroelectric film was fabricated by the sol-gel method. And then, we compared the surface characteristics before and after CMP process of BST films. We expect that our results will be useful promise of global planarization for FRAM application in the near future.

Growth and electrical properties of $Sr_2$$({Ta_{1-x}},{Nb_x})_2$)$O_7$ thin films by RF sputtering (RF Sputtering을 이용한 $Sr_2$$({Ta_{1-x}},{Nb_x})_2$)$O_7$ 박막의 성장 및 전기적 특성)

  • In, Seung-Jin;Choi, Hoon-Sang;Lee, Kwan;Choi, In-Hoon
    • Korean Journal of Materials Research
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    • v.11 no.5
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    • pp.367-371
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    • 2001
  • In this paper, theS $r_2$(T $a_{1-x}$ , N $b_{x}$)$_2$ $O_{7}$(STNO) films among ferroelectric materials having a low dielectric constant for metal-ferroelectric-semiconductor field effect transistor(MFS-FET) were discussed. The STNO thin films were deposited on p-type Si(100) at room temperature by co-sputtering with S $r_2$N $b_2$ $O_{7(SNO)}$ ceramic target and T $a_2$ $O_{5}$ ceramic target. The composition of STNO thin films was varied by adjusting the power ratios of SNO target and T $a_2$ $O_{5}$ target. The STNO films were annealed at 8$50^{\circ}C$, 90$0^{\circ}C$ and 9$50^{\circ}C$ temperature in oxygen ambient for 1 hour. The value of x has significantly influenced the structure and electrical properties of the STNO films. In the case of x= 0.4, the crystallinity of the STNO films annealed at 9$50^{\circ}C$ was observed well and the memory windows of the Pt/STNO/Si structure were 0.5-8.3 V at applied voltage of 3-9 V and leakage current density was 7.9$\times$10$_{08}$A/$\textrm{cm}^2$ at applied voltage of -5V.of -5V.V.V.

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