• 제목/요약/키워드: feedback topology

검색결과 58건 처리시간 0.025초

마이너스 군지연 회로를 이용한 아날로그 피드백 증폭기의 대역폭 확장에 관한 연구 (A Research on the Bandwidth Extension of an Analog Feedback Amplifier by Using a Negative Group Delay Circuit)

  • 최흥재;김영규;심성운;정용채;김철동
    • 한국전자파학회논문지
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    • 제21권10호
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    • pp.1143-1153
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    • 2010
  • 본 논문에서는 마이너스 군지연 회로를 이용하여 아날로그 RF 피드백 증폭기의 선형성 개선 대역폭을 증가시킬 수 있는 새로운 방법을 제안한다. 피드백 증폭기는 피드백 경로의 전달 시간 오차로 인하여 선형성 개선 대역폭이 제한되며, 그로 인하여 강력한 선형성 개선 효과에도 불구하고 거의 사용되지 않고 있다. 선행 연구를 통해 설계된 마이너스 군지연 회로의 군지연 특성을 응용하여 기존의 피드백 구조의 한계인 군지연 정합 문제를 해결하였다. 제작된 피드백 증폭기에 2-carrier Wideband Code Division Multiple Access (WCDMA) 신호를 인가하여 측정한 결과, WCDMA 기지국 하향 대역의 50 MHz 대역 전반에 걸쳐서 15 dB 이상의 선형성 개선 효과를 얻을 수 있었다. 평균 출력 전력이 28 dBm일 때 5 MHz 이격된 주파수에서 측정된 인접 채널 누설비(Adjacent Channel Leakage Ratio: ACLR)는 최대 25.1 dB 개선되어 -53.2 dBc로 측정되었다.

Bidirectional Power Conversion of Isolated Switched-Capacitor Topology for Photovoltaic Differential Power Processors

  • Kim, Hyun-Woo;Park, Joung-Hu;Jeon, Hee-Jong
    • Journal of Power Electronics
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    • 제16권5호
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    • pp.1629-1638
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    • 2016
  • Differential power processing (DPP) systems are among the most effective architectures for photovoltaic (PV) power systems because they are highly efficient as a result of their distributed local maximum power point tracking ability, which allows the fractional processing of the total generated power. However, DPP systems require a high-efficiency, high step-up/down bidirectional converter with broad operating ranges and galvanic isolation. This study proposes a single, magnetic, high-efficiency, high step-up/down bidirectional DC-DC converter. The proposed converter is composed of a bidirectional flyback and a bidirectional isolated switched-capacitor cell, which are competitively cheap. The output terminals of the flyback converter and switched-capacitor cell are connected in series to obtain the voltage step-up. In the reverse power flow, the converter reciprocally operates with high efficiency across a broad operating range because it uses hard switching instead of soft switching. The proposed topology achieves a genuine on-off interleaved energy transfer at the transformer core and windings, thus providing an excellent utilization ratio. The dynamic characteristics of the converter are analyzed for the controller design. Finally, a 240 W hardware prototype is constructed to demonstrate the operation of the bidirectional converter under a current feedback control loop. To improve the efficiency of a PV system, the maximum power point tracking method is applied to the proposed converter.

PI Controlled Active Front End Super-Lift Converter with Ripple Free DC Link for Three Phase Induction Motor Drives

  • Elangovan, P.;Mohanty, Nalin Kant
    • Journal of Power Electronics
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    • 제16권1호
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    • pp.190-204
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    • 2016
  • An active front end (AFE) is required for a three-phase induction motor (IM) fed by a voltage source inverter (VSI), because of the increasing need to derive quality current from the utility end without sacrificing the power factor (PF). This study investigates a proportional-plus-integral (PI) controller based AFE topology that uses a super-lift converter (SLC). The significance of the proposed SLC, which converts rectified AC supply to geometrically proceed ripple-free DC supply, is explained. Variations in several power quality parameters in the intended IM drive for 0% and 100% loading conditions are demonstrated. A simulation is conducted by using MATLAB/Simulink software, and a prototype is built with a field programmable gate array (FPGA) Spartan-6 processor. Simulation results are correlated with the experimental results obtained from a 0.5 HP IM drive prototype with speed feedback and a voltage/frequency (V/f) control strategy. The proposed AFE topology using SLC is suitable for three-phase IM drives, considering the supply end PF, the DC-link voltage and current, the total harmonic distortion (THD) in supply current, and the speed response of IM.

0.25 ${\mu}m$ T형 게이트 P-HEMT 제작 및 특성 평가와 MMIC 저잡음 증폭기에 응용 (Fabrication and characterization of the 0.25 ${\mu}m$ T-shaped gate P-HEMT and its application for MMIC low noise amplifier)

  • 김병규;김영진;정윤하
    • 전자공학회논문지D
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    • 제36D권1호
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    • pp.38-46
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    • 1999
  • 본 논문에서는 0.25${\mu}m$ T형 게이트 P-HEMT의 제작 및 특성 평가를 하였고, 제작된 P-HEMT를 X-밴드용 3단 MMIC 저잡음 증폭기 설계에 응용하였다.제작된 P-HEMT의 DC 특성은 최대 외인정 전달 컨덕턴스가 400mS/mm이고, 최대 드레인 전류는 400mA/mm이었다. RF 및 잡음 특성은 전류 이등 차단 주파수($f_T$)가 65GHz이고, 주파수 9GHz에서 최소 잡음 지수는 0.7dB, 관련 이득은 14.8dB이었다. 이때의 바이어스 조건은 Vds가 2V이고, Ids는 60%Idss이었다. 저잡음 증폭기 설계에 있어서, 회로 Topology는 인덕턴스 직렬 궤환(Series Feedback)으로 쇼토 스터브(Short Stub)를 사용하였다. 이때 최적의 쇼트 스터브 길이를 찾기 위해, 직렬 궤환에 의한 잡음 지수와 이득 특성, 그리고 안정성에 대한 영향을 조사하였다. 설계된 회로의 특성은 주파수 8.9-9.5GHz에서 이득이 33dB이상, 잡음 지수가 1.2dB이하, 그리고 입출력 반사 계수가 각각 15dB와 14dB이하로 우수한 성능을 보였다. 따라서 제작된 소자가 고이득 X-밴드용 저잡음 증록기에 매우 적합한 소자임을 확인할 수 있었다.

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A UHF CMOS Variable Gain LNA with Wideband Input Impedance Matching and GSM Interoperability

  • Woo, Doo Hyung;Nam, Ilku;Lee, Ockgoo;Im, Donggu
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권4호
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    • pp.499-504
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    • 2017
  • A UHF CMOS variable gain low-noise amplifier (LNA) is designed for mobile digital TV tuners. The proposed LNA adopts a feedback topology to cover a wide frequency range from 474 to 868 MHz, and it supports the notch filter function for the interoperability with the GSM terminal. In order to handle harmonic distortion by strong interferers, the gain of the proposed LNA is step-controlled while keeping almost the same input impedance. The proposed LNA is implemented in a $0.11{\mu}m$ CMOS process and consumes 6 mA at a 1.5 V supply voltage. In the measurement, it shows the power gain of greater than 16 dB, NF of less than 1.7 dB, and IIP3 of greater than -1.7 dBm for the UHF band.

Active Frequency with a Positive Feedback Anti-Islanding Method Based on a Robust PLL Algorithm for Grid-Connected PV PCS

  • Lee, Jong-Pil;Min, Byung-Duk;Kim, Tae-Jin;Yoo, Dong-Wook;Yoo, Ji-Yoon
    • Journal of Power Electronics
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    • 제11권3호
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    • pp.360-368
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    • 2011
  • This paper proposes an active frequency with a positive feedback in the d-q frame anti-islanding method suitable for a robust phase-locked loop (PLL) algorithm using the FFT concept. In general, PLL algorithms for grid-connected PV PCS use d-q transformation and controllers to make zero an imaginary part of the transformed voltage vector. In a real grid system, the grid voltage is not ideal. It may be unbalanced, noisy and have many harmonics. For these reasons, the d-q transformed components do not have a pure DC component. The controller tuning of a PLL algorithm is difficult. The proposed PLL algorithm using the FFT concept can use the strong noise cancelation characteristics of a FFT algorithm without a PI controller. Therefore, the proposed PLL algorithm has no gain-tuning of a PI controller, and it is hardly influenced by voltage drops, phase step changes and harmonics. Islanding prediction is a necessary feature of inverter-based photovoltaic (PV) systems in order to meet the stringent standard requirements for interconnection with an electrical grid. Both passive and active anti-islanding methods exist. Typically, active methods modify a given parameter, which also affects the shape and quality of the grid injected current. In this paper, the active anti-islanding algorithm for a grid-connected PV PCS uses positive feedback control in the d-q frame. The proposed PLL and anti-islanding algorithm are implemented for a 250kW PV PCS. This system has four DC/DC converters each with a 25kW power rating. This is only one-third of the total system power. The experimental results show that the proposed PLL, anti-islanding method and topology demonstrate good performance in a 250kW PV PCS.

Digital Control of an AC/DC Converter using the Power Balance Control Technique with Average Output Voltage Measurement

  • Wisutmetheekorn, Pisit;Chunkag, Viboon
    • Journal of Power Electronics
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    • 제12권1호
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    • pp.88-97
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    • 2012
  • This paper presents a method for the digital control of a high power factor AC/DC converter employing the power balance control technique to achieve a fast response of the output voltage control. To avoid the effects of an output voltage ripple in the voltage control loop, the average output voltage is sampled and used as a feedback signal for the output voltage controller. The proposed control technique was verified by simulations using MATLAB/Simulink and its implementation was realized by a dsPIC30F4011 digital signal processor to control a CUK topology AC/DC converter with a 48V output voltage and a 250 W output power. The experimental results agree with the simulation results. The proposed control technique achieves a fast transient response with a lower line current distortion than is achieved when using a conventional proportional-integral controller and the power balance control technique with the conventional sampling method.

PHEMT소자를 이용한 K-band MMIC 발진 설계 (K-band MMIC Oscillator Design Using the PHEMT)

  • 이지형;채연식;조희철;윤용순;이진구
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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    • pp.88-91
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    • 2000
  • An MMIC oscillator operating at the 24.55 GHz has been designed using 0.2 ${\mu}{\textrm}{m}$AlGaAs/InGaAs/GaAs Pseudomorphic HEMT technology. The active device used in the oscillator design has a 0.2 ${\mu}{\textrm}{m}$ gate length PHEMT with 4$\times$80 ${\mu}{\textrm}{m}$ gate width. We obtained 4.08 dB of S$_{21}$ gain and 317 mS/mm of transconductance, and extrapolated unit current gain cut-off frequency (f$_{T}$) and maximum oscillation frequency (fmax) were 62 GHz and 120 GHz, respectively. The circuit are based on a series feedback and negative resistance topology. Microstrip line open stub is used to terminating. The oscillator circuits has designed for delivering maximum power to load and conjugated matching. The simulated small signal negative resistance was 50 Ω. We obtained 1.002 of loop gain and 0.0005$^{\circ}$angle from the simulation by HP libra 6.1. The layout for oscillator is 1.2$\times$1.8 $\textrm{mm}^2$.>.

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단일 전류 센서를 이용하는 새로운 브리지 없는 인터리빙 방식의 역률 보상 회로 (A Novel Bridgeless Interleaved Power Factor Correction Circuit with Single Current Sensor)

  • 도안반투안;최우진
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2016년도 전력전자학술대회 논문집
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    • pp.363-364
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    • 2016
  • In this paper, a novel bridgeless interleaved power factor correction circuit with single current sensor is proposed. The proposed control strategy requires only one current sensor for the interleaved bridgeless PFC. By sampling the output current, all the boost indictor currents can be calculated and used to control the input current according to the input voltage. The reduced number of current sensors and associated feedback circuits helps reduce the cost of system. The problem caused by the unequal current gain between current sensors inherently does not exist in the proposed topology. Thus, current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. In addition, the proposed technique can be applied to the other kinds of interleaved PFC topologies. Performance of the proposed control strategy is verified by the experimental results with 6.6kW bridgeless interleaved PFC circuit.

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CFturbo 설계 및 Fine/Turbo 유동해석을 활용한 빠르고 효과적인 터보압축기의 개발 과정 확립 (SETUP OF RAPID AND EFFICIENT PROCESS OF TURBO-COMPRESSOR R&D WITH CFTURBO DESIGN AND FINE/TURBO CFD)

  • 김진권
    • 한국전산유체공학회:학술대회논문집
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    • 한국전산유체공학회 2010년 춘계학술대회논문집
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    • pp.129-130
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    • 2010
  • Design of turbo-compressors has been considered to be a high-tech which only a few early industrialized countries could do efficiently since it requires not only deep understanding of high level gas dynamics and complex fluid dynamics but also accumulation of experiences in the feedback of expensive manufacturing and difficult testing to the design theory and empirical design coefficients. CFturbo is the turbomachinery design software which incorporates traditional well formulated German design technology and latest software technology of 3-dimensional graphics. Fine/Turbo is a powerful tubomachinery-oriented CFD package with quality structured grid topology templates for almost all the tubomachinery configurations for easy, fast and accurate CFD analysis. Rapid and effcient process off turbo-compressor R&D is setup with the combination of CFturbo and Fine/Turbo.

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