• Clean Technology
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• v.18 no.3
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• pp.280-286
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• 2012

The dry etching of sacrificial $SiO_2$ was performed in supercritical carbon dioxide. The etching of boron phosphor silica glass (BPSG), tetraethyl orthosilicate (TEOS), thermal $SiO_2$, and Si-nitride (SiN) was investigated by using a two chamber system with HF/py etchant and alcohol additives. The etch rate of sacrificial $SiO_2$ increased upon the addition of methanol. The etch selectivity of BPSG with respect to SiN was highest with IPA although the highest etch rate was resulted from methanol except BPSG. The etch rate increased with the temperature in HF/py/MeOH system. Especially the increase of the etch rate was much higher for BPSG with an increase in the reaction temperature. The etch residue was not reduced apparently upon the addition of alcohol cosolvents to HF/py. While the etch rate in HF/$H_2O$ was higher than HF/py/alcohol system, the rate decreased with the addition of alcohols to HF/$H_2O$. The cantilever beam structure of high aspect ratios was released by the dry ething in supercritical carbon dioxide without damage.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.287-287
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• 2011

ITRS(international technology roadmap for semiconductors)에 따르면 MOS (metal-oxide-semiconductor)의 CD(critical dimension)가 45 nm node이하로 줄어들면서 poly-Si/SiO2를 대체할 수 있는 poly-Si/metal gate/high-k dielectric이 대두되고 있다. 일반적으로 metal gate를 식각시 정확한 CD를 형성시키기 위해서 plasma를 이용한 RIE(reactive ion etching)를 사용하고 있지만 PIDs(plasma induced damages)의 하나인 PICD(plasma induced charging damage)의 발생이 문제가 되고 있다. PICD의 원인으로 plasma의 non-uniform으로 locally imbalanced한 ion과 electron이 PICC(plasma induced charging current)를 gate oxide에 발생시켜 gate oxide의 interface에 trap을 형성시키므로 그 결과 소자 특성 저하가 보고되고 있다. 그러므로 본 연구에서는 이에 차세대 MOS의 metal gate의 식각공정에 HDP(high density plasma)의 ICP(inductively coupled plasma) source를 이용한 중성빔 시스템을 사용하여 PICD를 줄일 수 있는 새로운 식각 공정에 대한 연구를 하였다. 식각공정조건으로 gas는 HBr 12 sccm (80%)와 Cl2 3 sccm (20%)와 power는 300 w를 사용하였고 200 eV의 에너지로 식각공정시 TEM(transmission electron microscopy)으로 TiN의 anisotropic한 형상을 볼 수 있었고 100 eV 이하의 에너지로 식각공정시 하부층인 HfO2와 높은 etch selectivity로 etch stop을 시킬 수 있었다. 실제 공정을 MOS의 metal gate에 적용시켜 metal gate/high-k dielectric CMOSFETs의 NCSU(North Carolina State University) CVC model로 effective electric field electron mobility를 구한 결과 electorn mobility의 증가를 볼 수 있었고 또한 mos parameter인 transconductance (Gm)의 증가를 볼 수 있었다. 그 원인으로 CP(Charge pumping) 1MHz로 gate oxide의 inteface의 분석 결과 이러한 결과가 gate oxide의 interface trap양의 감소로 개선으로 기인함을 확인할 수 있었다.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.9
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• pp.48-53
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• 1998

We have fabricated electrostatic lens with novel structure by mixing surface- and bulk-micromachining technology. Polysilicon was used for both the structure and sacrificial layer, and the structure layer was passivated with thermal oxide in order not to be attacked during the silicon wet etching. Compared with conventional electrostatic lens used in microcolumn, this device has the advantages in ; 1) hole alignment, throughput, reliability, damage of lens, 2) the possibility of arrayed lithography through the integration of microcolumn.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2002.05a
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• pp.40-44
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• 2002

The motivation of this work is to use SAM(Self-Assembled Monolayer) for developing a rapid and flexible non-photolithographic nano-structure fabrication technique which can be utilized in micro-machining of metals as well as silicon-based materials. The fabrication technique implemented in this work consists of a two-step process, namely, mechanical scribing followed by chemical etching. From the experimental results, it was found that thiol on copper surface could be removed even under a few nN normal load. The nano-tribological characteristics of thiol-SAM on various metals were largely dependent on the native oxide layer of metals. Based on these findings, nano-patterns with sub-micrometer width and depth on metal surfaces such as Cu, Au and Ag could be obtained using a diamond-coated tip.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.886-888
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• 1998

By irradiating photoresist on Si or glass with $Ar^+$ (${\lambda}$=514 nm, CW) and Nd:YAG (${\lambda}$=266 and 532nm, pulse) laser beam, the photoresist was etched masklessly in air. Using a fourth harmonic Nd:YAG laser beam, the etching threshold of energy fluence was $25\;J/cm^2$ and the damage of substrate was appeared over $40\;J/cm^2$.

• ETRI Journal
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• v.24 no.5
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• pp.398-400
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• 2002

Using $Cr_2O_3$ thin film, we developed a novel etch-stop technique for the protection of silicon surface morphology during deep ion coupled plasma etching of silica layers. With this technique we were able to etch a silica trench with a depth of over 20 ${\mu}m$ without any damage to the exposed silicon terrace surface. This technique should be well applicable to fabricating silica planar lightwave circuit platforms for opto-electronic hybrid integration.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.321-321
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• 2014

GaN는 LED, 태양전지, 그리고 전자소자 등에 쓰이는 물질로, 관련 연구가 활발히 진행되고 있으며, 이와 더불어 top-down방식을 활용한 소자제작 방법 또한 발달되고 있다. 하지만, top-down공정 시 발생 되는 건식 식각에 의한 소자의 손상이 발생되고, 이로 인하여 누설전류가 발생하는 등 여러 가지 문제점이 발생하고 있다. 특히, top-down에서 널리 사용하는 건식식각을 통한 GaN 식각의 경우, nonpolar 면이 아닌, semipolar 면이 드러나게 되며, 이 면은 건식 식각시 발생하는 손상을 포함하고 있다. 본 연구에서는 이러한 문제를 해결하기 위해서, 약 $2{\mu}m$ 크기의 diameter를 갖는 micro-sized column LED를 제작하고, 건식 식각 이후, KOH surface treatment를 통해 손상된 면을 제거함과 동시에 nonpolar면을 드러내는 실험을 실시하였으며, 더불어 column의 diameter를 줄이는 방법을 논하고자 한다.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2015.11a
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• pp.332-332
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• 2015

Block Copolymer lithography는 deep nano-scale device 제작을 위한 기존의 top-down방식의 photo-lithography를 대체할만한 기술로 많은 연구가 진행되고 있다. polystyrene(PS)/poly-methyl methacrylate (PMMA)로 구성된 BCP의 nano-scale PS mask는 일반적인 플라즈마 공정에 쉽게 damage를 입는다. 중성빔 식각을 이용하여 식각 공정 중 발생하는 BCP의 degradation을 감소시키고, 비등방성 식각 profile을 얻을 수 있으며 sidewall roughness(SWR)와 sidewall angle(SWA)가 향상되는 것을 알 수 있었다.

• Proceedings of the Korean Society of Laser Processing Conference
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• 2006.11a
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• pp.103-107
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• 2006

Decapsulation of EMC(Epoxy Molding Compound) in package device is a method used to inspect inside of device by removing plastic molding. So far, chemical etching and mechanical grinding methods have been used widely. Recently, several works using laser have been carried out. This method has advantages with fast process time and precision than conventional methods because of noncontact process. Also, laser process is a clean process because of removing EMC directly without using toxic chemicals. The wavelength of laser used in this study is 355nm. Key parameters of removing EMC are laser power, scan speed, and number of scans of laser. It if confirmed that laser decapsulation is a useful process to inspect inside a device with a small thermal damage to chip surface.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.9
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• pp.700-706
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• 2001

In this paper, I have fabricated and measured the gallium nitride(GaN) based Schottky diodes, and have carried out analyses of degradation of Schottky barrier characteristics. To improve of degraded Schottky barrier characteristics, I have carried out several experiments such as N$_2$ plasma exposure, annealing in N$_2$ ambient and annealing after N$_2$ plasma exposure. In the results of these experiments, I have achieved that only annealing in N$_2$ ambient is enough to improve the Schottky barrier characteristics, are temperature of 700$\^{C}$ and time of 90 sec in N$_2$ ambient furnace. for the analysis of these experiments, I have carried out the measurement of electric characteristics and quantitative analysis of etching damage using AES(Aguger Electron Spectroscopy).