• Title/Summary/Keyword: error correction codes

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Packet Size Optimization for Improving the Energy Efficiency in Body Sensor Networks

  • Domingo, Mari Carmen
    • ETRI Journal
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    • v.33 no.3
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    • pp.299-309
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    • 2011
  • Energy consumption is a key issue in body sensor networks (BSNs) since energy-constrained sensors monitor the vital signs of human beings in healthcare applications. In this paper, packet size optimization for BSNs has been analyzed to improve the efficiency of energy consumption. Existing studies on packet size optimization in wireless sensor networks cannot be applied to BSNs because the different operational characteristics of nodes and the channel effects of in-body and on-body propagation cannot be captured. In this paper, automatic repeat request (ARQ), forward error correction (FEC) block codes, and FEC convolutional codes have been analyzed regarding their energy efficiency. The hop-length extension technique has been applied to improve this metric with FEC block codes. The theoretical analysis and the numerical evaluations reveal that exploiting FEC schemes improves the energy efficiency, increases the optimal payload packet size, and extends the hop length for all scenarios for in-body and on-body propagation.

Bit-selective Forward Error Correction for 14Kbps SBC-APCM (AQB) over Digital Mobile Communication Channels (디지털 이동통신 채널상의 14Kbps SBC-APCM(AQB)를 위한 비트선택적 에러정정부호)

  • 김민구;이재홍
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.6
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    • pp.821-828
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    • 1990
  • A forward error correction (FEC) technique is presented for speech data in 16 Kbps digital mobile communications. 14Kbps SBC-APCM(AQB) and QPSK are used as speech coding and modulation techniques, respectively. Because each bit in a speech data block had different importance, applying FEC to speech data bit-selectively in more effective than applying FEC to all speech data equally. To select bits in a speech data block to be protected by FEC the bit error sensitivity of each bit is computed. For a few BCH and Reed-Solomon codes used as bit-selective FEC the performance of the coding technique is computed.

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An Optimal Scrubbing Scheme for Protection of Memory Devices against Soft Errors (메모리 소자의 소프트 에러 극복을 위한 최적 스크러빙 방안)

  • Ryu, Sang-Moon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.677-680
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    • 2011
  • Error detection and correcting codes are typically used to protect against soft errors. In addition, scrubbing is applied which is a fundamental technique to avoid the accumulation of soft errors. This paper introduces an optimal scrubbing scheme, which is suitable for a system with auto error detection and correction logic. An auto error detection and correction logic can correct soft errors without CPU's writing operation. The proposed scrubbing scheme leads to maximum reliability by considering both allowable scrubbing load and the periodic accesses to memory by the tasks running in the system.

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An Aging Measurement Scheme for Flash Memory Using LDPC Decoding Information

  • Kang, Taegeun;Yi, Hyunbean
    • Journal of the Korea Society of Computer and Information
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    • v.25 no.1
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    • pp.29-36
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    • 2020
  • Wear-leveling techniques and Error Correction Codes (ECCs) are essential for the improvement of the reliability and durability of flash memories. Low-Density Parity-Check (LDPC) codes have higher error correction capabilities than conventional ECCs and have been applied to various flash memory-based storage devices. Conventional wear-leveling schemes using only the number of Program/Erase (P/E) cycles are not enough to reflect the actual aging differences of flash memory components. This paper introduces an actual aging measurement scheme for flash memory wear-leveling using LDPC decoding information. Our analysis, using error-rates obtained from an flash memory module, shows that LDPC decoding information can represent the aging degree of each block. We also show the effectiveness of the wear-leveling based on the proposed scheme through wear-leveling simulation experiments.

R&D Status of Quantum Computing Technology (양자컴퓨팅 기술 연구개발 동향)

  • Baek, C.H.;Hwang, Y.S.;Kim, T.W.;Choi, B.S.
    • Electronics and Telecommunications Trends
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    • v.33 no.1
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    • pp.20-33
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    • 2018
  • The calculation speed of quantum computing is expected to outperform that of existing supercomputers with regard to certain problems such as secure computing, optimization problems, searching, and quantum chemistry. Many companies such as Google and IBM have been trying to make 50 superconducting qubits, which is expected to demonstrate quantum supremacy and those quantum computers are more advantageous in computing power than classical computers. However, quantum computers are expected to be applicable to solving real-world problems with superior computing power. This will require large scale quantum computing with many more qubits than the current 50 qubits available. To realize this, first, quantum error correction codes are required to be capable of computing within a sufficient amount of time with tolerable accuracy. Next, a compiler is required for the qubits encoded by quantum error correction codes to perform quantum operations. A large-scale quantum computer is therefore predicted to be composed of three essential components: a programming environment, layout mapping of qubits, and quantum processors. These components analyze how many numbers of qubits are needed, how accurate the qubit operations are, and where they are placed and operated. In this paper, recent progress on large-scale quantum computing and the relation of their components will be introduced.

Estimation-based Watermarking Algorithm with Low Density Parity Check (LDPC) Codes (LDPC를 이용한 예측 기반 워터마킹 알고리듬)

  • Lim, Jae-Hyuck;Won, Chee-Sun
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.1
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    • pp.76-84
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    • 2007
  • The goal of this paper is to improve the watermarking performance using the following two methods; watermark estimation and low density parity check (LDPC) codes. For a blind watermark decoding, the power of a host image, which is hundreds times greater than the watermark power, is the main noise source. Therefore, a technique that can reduce the effect of the power of the host image to the detector is required. To this end, we need to estimate watermark from the watermarked image. In this paper, the watermark estimation is done by an adaptive estimation method with the generalized Gaussian distribution modeling of sub-band coefficients in the wavelet domain. Since the watermark capacity as well as the error rate can be improved by adopting optimum decoding principles and error correcting codes (ECC), we employ the LDPC codes for the decoding of the estimated watermark. Also, in LDPC codes, the knowledge about the noise power can improve the error correction capability. Simulation results demonstrate the superior performance of the proposed algorithm comparing to LDPC decoding with other estimation-based watermarking algorithms.

4-level Error Correcting Modulation Codes for Holographic Data Storage System (홀로그래픽 데이터 저장장치를 위한 4-레벨 오류정정 변조부호)

  • Lee, Jaehun;Lee, Jaejin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39A no.10
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    • pp.610-612
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    • 2014
  • Mutilevel holographic data storage systems have a big advantage for capacity since it can store more than one bit per pixel. For instance, 2/3 modulation code stores 2/3(symbol/pixel) and 4/3(bit/pixel). Then it is about 1.3 bits per one pixel. In this paper, we propose two 4-level modulation codes, which have the minimum Euclidean distances of 3 and 4, respectively. The proposed codes perform better than random data. The performance of larger minimum distance code shows better than that of shorter one.

New QECCs for Multiple Flip Error Correction (다중플립 오류정정을 위한 새로운 QECCs)

  • Park, Dong-Young;Kim, Baek-Ki
    • The Journal of the Korea institute of electronic communication sciences
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    • v.14 no.5
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    • pp.907-916
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    • 2019
  • In this paper, we propose a new five-qubit multiple bit flip code that can completely protect the target qubit from all multiple bit flip errors using only CNOT gates. The proposed multiple bit flip codes can be easily extended to multiple phase flip codes by embedding Hadamard gate pairs in the root error section as in conventional single bit flip code. The multiple bit flip code and multiple phase flip code in this paper share the state vector error information by four auxiliary qubits. These four-qubit state vectors reflect the characteristic that all the multiple flip errors with Pauli X and Z corrections commonly include a specific root error. Using this feature, this paper shows that low-cost implementation is possible despite the QECC design for multiple-flip error correction by batch processing the detection and correction of Pauli X and Z root errors with only three CNOT gates. The five-qubit multiple bit flip code and multiple phase flip code proposed in this paper have 100% error correction rate and 50% error discrimination rate. All QECCs presented in this paper were verified using QCAD simulator.

Technology Trends of Fault-tolerant Quantum Computing (결함허용 양자컴퓨팅 시스템 기술 연구개발 동향)

  • Hwang, Y.;Kim, T.W.;Baek, C.H.;Cho, S.U.;Kim, H.S.;Choi, B.S.
    • Electronics and Telecommunications Trends
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    • v.37 no.2
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    • pp.1-10
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    • 2022
  • Similar to present computers, quantum computers comprise quantum bits (qubits) and an operating system. However, because the quantum states are fragile, we need to correct quantum errors using entangled physical qubits with quantum error correction (QEC) codes. The combination of entangled physical qubits with a QEC protocol and its computational model are called a logical qubit and fault-tolerant quantum computation, respectively. Thus, QEC is the heart of fault-tolerant quantum computing and overcomes the limitations of noisy intermediate-scale quantum computing. Therefore, in this study, we briefly survey the status of QEC codes and the physical implementation of logical qubit over various qubit technologies. In summary, we emphasize 1) the error threshold value of a quantum system depends on the configurations and 2) therefore, we cannot set only any specific theoretical and/or physical experiment suggestion.

Analysis on Decryption Failure Probability of TiGER (TiGER의 복호화 실패율 분석)

  • Seungwoo Lee;Jonghyun Kim;Jong Hwan Park
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.34 no.2
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    • pp.157-166
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    • 2024
  • Probability of decryption failure of a public key cryptography based on LWE(learning with errors) is determined by its architecture and parameter settings. Since large decryption failure probability leads to attacks[1] on scheme as well as degradation of performance, TiGER[2], a Ring-LWE(R)-based KEM proposed for the first round of KpqC, tried to reduce the decryption failure probability by using error correction code Xef and D2 encoding method. However, D'Anvers et al. has shown that the commonly assumed independence of each bit error is not established since in the case of an encryption scheme based on Ring-LWE(R) using an error correction code, there is error dependency which is not negligible[3]. In this paper, since TiGER does not consider the error dependency, we calcualte the decryption failure probability of TiGER by considering the error dependency. In addition, we found that the bit error probability is incorrectly calculated in TiGER, so we present the correct calculation.