• 제목/요약/키워드: error correcting

검색결과 459건 처리시간 0.033초

An Efficient CPM Adaptive Decoding Technique over the Burst Error Channel (연집 오류 채널에 효율적인 CPM 적응복호 방식)

  • 정종문;김대중;정호영;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제19권8호
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    • pp.1548-1557
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    • 1994
  • In this paper, the dual mode error correcting adaptive decoding algorithm which is adapted to the continuous phase frequency shift keying(CPFSK) modulation is presented as a technique for overcoming the distortion that reveals from the Rayleigh fading channel. The dual mode adaptive decoder nominally operates as a Viterbi decoder and switches to the burst error correcting mode, whenever the decoder detects an uncorrectable burst error pattern. Under the fading channel environment and when the usable memory quantity is restricted, the dual mode adaptive decoding algorithm shows an advantage in the BER performance over the interleaving technique, and also obtains the merit of not needing the large time delay that the interleaving technique requires. The experimental results from the computer simulation demonstrate the performance of the algorithm and verify the theoretical results.

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Recursive Error-Component Correcting Method for 3D Shape Reconstruction (3차원 형상 복원을 위한 재귀적 오차 성분 보정 방법)

  • Koh, Sung-shik
    • Journal of the Korea Institute of Information and Communication Engineering
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    • 제21권10호
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    • pp.1923-1928
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    • 2017
  • This paper is a study on error correction for three-dimensional shape reconstruction based on factorization method. The existing error correction method based on factorization has a limitation of correction because it is optimized globally. Thus in this paper, we propose our new method which can find and correct the only major error influence factor toward three-dimensional reconstructed shape instead of global approach. We define the error-influenced factor in two-dimensional re-projection deviation space and directly control the error components. In addition, it is possible to improve the error correcting performance by recursively applying the above process. This approach has an advantage under noise because it controls the major error components without depending on any geometric information. The performance evaluation of the proposed algorithm is verified by simulation with synthetic and real image sequence to demonstrate noise robustness.

Error Correcting using the Check digit on Barcode, and the present and future of Barcode (바코드에 있어서 체크숫자를 이용한 오류수정과 바코드의 현재와 미래)

  • Kim, Hwa-Joon
    • Journal for History of Mathematics
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    • 제21권2호
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    • pp.103-118
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    • 2008
  • Barcode technology is becoming an essential tool for every companies, and this makes help us to gain time, analysis of goods, an inventory control, a prevention of burglar and so on. In this paper, we have treated about the history of barcode, its error correcting using the check digit, and the present and future of barcode. We wish roles of mathematician on new barcode system which it bring on an economical efficiency and stability.

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Design of Arithmetic processor with multiple valued BCH code (다치 BCH 부호를 갖는 연산기 설계에 관한 연구)

  • 송홍복;이흥기
    • Journal of the Korea Institute of Information and Communication Engineering
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    • 제3권4호
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    • pp.737-745
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    • 1999
  • In this paper, we present encoders and decoders with the two kinds of ternary Bose-Chaudhuri-Hocquenghem(BCH) codes in the most basic ternary code system from among multiple-valued code systems. One is the random-triple-error-correcting ternary BCH(26,14) code for sequential data, the other is random-triple -error-correcting ternary BCH (26,13) code. The encoders and the decoders realized are verified by experiment. Amount of the (26,13) decoder's hardware is about 50% of the one of the (26,14) decoder's one.

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FPGA implementation of overhead reduction algorithm for interspersed redundancy bits using EEDC

  • Kim, Hi-Seok
    • Journal of IKEEE
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    • 제21권2호
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    • pp.130-135
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    • 2017
  • Normally, in data transmission, extra parity bits are added to the input message which were derived from its input and a pre-defined algorithm. The same algorithm is used by the receiver to check the consistency of the delivered information, to determine if it is corrupted or not. It recovers and compares the received information, to provide matching and correcting the corrupted transmitted bits if there is any. This paper aims the following objectives: to use an alternative error detection-correction method, to lessens both the fixed number of the required redundancy bits 'r' in cyclic redundancy checking (CRC) because of the required polynomial generator and the overhead of interspersing the r in Hamming code. The experimental results were synthesized using Xilinx Virtex-5 FPGA and showed a significant increase in both the transmission rate and detection of random errors. Moreover, this proposal can be a better option for detecting and correcting errors.

The development of localization server system for location-awareness in smart home (지능형 홈에서 위치인지를 위한 localization server system 기술 개발)

  • Lim, Ho-Jung;Kang, Jeong-Hoon;Lee, Min-Goo;Yoo, June-Jae;Yoon, Myung-Hyun
    • Proceedings of the KIEE Conference
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    • 대한전기학회 2005년도 학술대회 논문집 정보 및 제어부문
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    • pp.606-608
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    • 2005
  • In this paper, we introduce localization server system calculated real location of objects using raw data of location-awareness from sensor node gateway. The software architecture of localization server system consists of location calculation and actuator control based on location. Also, this system supports for collecting raw data, calculating location of real objects using raw data, correcting error from outer environment, and server for applications based on location.

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Performance Analysis of Concatenated Codes for High Altitude Platform System (성층권 통신시스템을 위한 연접부호의 성능분석)

  • 백동철;안도섭;구본준;박광량
    • Proceedings of the IEEK Conference
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    • 대한전자공학회 1999년도 추계종합학술대회 논문집
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    • pp.759-762
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    • 1999
  • In this paper, we introduce the concept of a HAPS(High Altitude Platform Station) system which is expected to be a next generation communication system and suggest several error correcting codes to provide high quality services. Since a HAPS system encounters serious signal attenuation due to rain and scattering in the air, concatenated codes which have a high coding gain is considered to be a proper error correcting method. In this paper, we provide performance analyses result of two candidate coding schemes for a HAPS. The first one is a conventional concatenated coding scheme, and the second one is a iterative decoding method known as Turbo Codes.

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A Continuous Versatile Reed-Solomon Decoder with Variable Code Rate and Block Length (가변 부호율과 블록 길이를 갖는 연속 가변형 리드솔로몬 복호기)

  • 공민한;송문규
    • Proceedings of the IEEK Conference
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 I
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    • pp.549-552
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    • 2003
  • In this paper, an efficient architecture of a versatile Reed-Solomon (RS) decoder is designed, where the message length k as well as the block length n can be variable. The decoder permits 3-step pipelined processing based on the modified Euclid's algorithm(MEA). A new architecture for the MEA is designed for variable values of error correcting capability t. To maintain the throughput rate with less circuitry, the MEA block uses both the recursive and the overclocking technique. The decoder can decode a codeword received not only in a burst mode, but also in a continuous mode. It can be used in a wide range of applications due to its versatility. A versatile RS decoder over GF(2$^{8}$ ) having the error-correcting capability of up to 10 has been designed in VHDL, and successfully synthesized in an FPGA chip.

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Performance analysis of FH/CPFSK system with the error-correcting code and the diversity under rayleigh fading channel with the thermal noise and the partial-band noise jamming (열잡음과 부분대역재밍이 존재하는 레일레이 페이딩 채널에서 오류정정부호와 다이버시티를 고려한 FH/CPFSK 시스템의 성능분석)

  • 곽진규;박진수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제21권7호
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    • pp.1787-1802
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    • 1996
  • In this paper, the performance for FH/CPFSK system with limiter-discriminator detection and integrage-and-dump post-detection filtering under thermal noie, partial-band noise jamming and rayleigh fading have been analyzed. The method of hard-decision diversity of which the transmitter repeated L times on different hops for each data symbol in a way to mutigate the effects of the jamming has been applied, and the receiver has been combined the L chips. Also, error-correcting code have been applied for improving performance of system. The thermal noise and partial-band noise jamming, intersymbol interference for all eight of the possible adjacent bit data patterns, and FM noise click for evaluating systems have been considered. Also optimum parameters to improve performance of FH/CPFSK system have been obtained and validities have been proved through computer simulation.

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A Study on Decoding Method of the R-S Code for Double-Encoding System in the Frequency Domain (주파수 영역에서 2중부호화 R-S부호의 부호방식에 관한 연구)

  • 전경일;김남욱;김용득
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제14권3호
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    • pp.216-226
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    • 1989
  • In this paper, we explain about an outline of the decoding method for double encoding system using the error correcting capacitance and a simple decoding method. We have been taken formation two-dimension code word of doubly-encoded code using $C_1$(32, 28, 5) and $C_2$(32, 26, 7) Reed-Solomon codes, and had computer simulation of the erroe correcting processes in frequency domain. On these processes, the newly developed digital signal processing technology such as error correction using Berlekamp-Massey algorithm in frequency domain have been proven.

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