• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.145-148
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• 2016

In this paper, we propose a design of Intra Prediction angular mode decision for high-performance HEVC encoder. Intra Prediction works by performing all 35 modes for efficient encoding. However, in order to process all of the 35 modes, the computational complexity and operational time required are high. Therefore, this paper proposes comparing the difference in the value of the original image pixel, using an algorithm that determines Angular mode efficiently. This new algorithm reduces the Hardware size. The hardware which is proposed was designed using Verilog HDL and was implemented in 65nm technology. Its gate count is 14.9k and operating speed is 2GHz.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.4
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• pp.1830-1838
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• 2012

The intra prediction and the motion estimation of inter prediction occupy 70 ~ 80% of whole compression time in H.264/AVC. Compression efficiency has been higher, but complexity has increased and coding time has also increased much more. This paper proposes a block size decision method of the intra prediction and mode decision method which minimize the loss of video quality during the encoding and shorten the time spent. This paper, in addition, proposes an algorithm which determines the method of adaptive block mode for motion estimation of inter prediction. We investigated PSNR and the intra prediction and inter prediction of time-consuming calculations in order to measure video quality degradation and complexity through experiments. Consequently, when you use all three methods, these methods showed that average coding time is shortened as about 500 to 600ms in every frame in the case of all experimented videos, keeping video quality nearly similar, compared with existing methods of H.264.

• Journal of Broadcast Engineering
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• v.17 no.5
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• pp.716-724
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• 2012

In this paper, we propose a fast decision method of maximum coding depth decision and reference frame selection in HEVC. To reduce computational complexity and encoding time of HEVC, two methods are proposed. In the first method, the maximum depth of each coding unit (CU) in a largest CU (LCU) is constrained by using the maximum coding depth used by adjacent LCUs based on the assumption that the spatial correlation is very high and rate-distortion (R-D) cost. And we constrain the number of reference pictures for prediction unit (PU) performing motion estimation by using the motion information of the upper depth PU. The proposed methods reduce computational complexity of the HEVC encoder by constraining the maximum coding depth and the reference frame. We could achieve about 39% computational complexity reduction with marginal bitrate increase of 1.2% in the comparison with HM6.1 HEVC reference software.

• The KIPS Transactions:PartB
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• v.10B no.2
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• pp.143-150
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• 2003

Error concealment plays an important role in combating transmission errors. Methods of error concealment which produce better quality are generally of higher complexity, thus making some of the more sophisticated algorithms is not suitable for real-time applications. In this paper, we develop temporal and spatial error resilient video encoding and data hiding approach to facilitate the error concealment at the decoder. Block interleaving scheme is introduced to isolate erroneous blocks caused by packet losses for spatial area of error resilience. For temporal area of error resilience, data hiding is applied to the transmission of parity bits to protect motion vectors. To do error concealment quickly, a set of edge features extracted from a block is embedded imperceptibly using data hiding into the host media and transmitted to decoder. If some part of the media data is damaged during transmission, the embedded features are used for concealment of lost data at decoder. This method decreases a complexity of error concealment by reducing the estimation process of lost data from neighbor blocks. The proposed data hiding method of parity bits and block features is not influence much to the complexity of standard encoder. Experimental results show that proposed method conceals properly and effectively burst errors occurred on transmission channel like Internet.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.4
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• pp.172-179
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• 2014

HEVC (High Efficiency Video Coding) fine-tuned many existing coding tools and adopted also many new coding techniques. As a result, HEVC has accomplished about 2 times of compression efficiency enhancement compared to the existing video coding standard of H.264/AVC. One of the newly adopted tools in HEVC is the transform skip scheme which performs quantization without transform. This technique improves coding efficiency especially with computer-generated images. However, the unavailability of global or local properties of general video signals demands encoder to decide whether performing transform or not for each TU (Transform Unit). The necessity of computing rate-distortion costs for this decision is one reason to increase encoder complexity. In this paper, a fast transform skip mode decision method is proposed, which is based on the fast decision of rate-distortion cost calculation for transform skip mode, by considering frequency characteristics of residual signal. The proposed method can reduce $4{\times}4$ TU encoding time by about 27.1% with only about 0.03% consequential decrement in BDBR.

• Journal of Broadcast Engineering
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• v.18 no.6
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• pp.835-849
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• 2013

Joint Collaborative Team on Video Coding (JCT-VC), which have founded ISO/IEC MPEG and ITU-T VCEG, has standardized High Efficiency Video Coding (HEVC). Standardization of HEVC has started with purpose of twice or more coding performance compared to H.264/AVC. However, flexible and hierarchical coding block and recursive coding structure are problems to overcome of HEVC standard. Many fast encoding algorithms for reducing computational complexity of HEVC encoder have been proposed. However, it is hard to implement a real-time HEVC encoder only with those fast encoding algorithms. In this paper, for implementation of software-based real-time HEVC encoder, data-level parallelism using SIMD instructions and CPU/GPU multi-threading methods are proposed. And we also proposed appropriate operations and functional modules to apply the proposed methods on HM 10.0 software. Evaluation of the proposed methods implemented on HM 10.0 software showed 20-30fps for $832{\times}480$ sequences and 5-10fps for $1920{\times}1080$ sequences, respectively.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.6
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• pp.48-56
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• 2010

Recently, we need to dramatically speed up real-time video encoding and decoding on mobile devices because complexity of video CODEC is significantly increasing along with the demand for multimedia service of high-quality and high-definition videos by users. A variety of research is conducted for parallelism of video processing using newly developed multi-core platforms. In this paper, we propose a method of parallelism based on slice partition of video compression CODEC. We propose a novel concept of a parallel slice for parallelism and propose a new coding order to be adequate to the parallel slice which keeps high coding efficiency. To minimize synchronization time of multiple parallel slices, we also propose a synchronization method to determinate whether the parallel slice could be independently decoded or not. Experimental results shows that we achieved 27.5% (40.7%) speed-up by parallelism with bit-rate increase of 3.4% (2.7%) for CIF sequences (720p sequences) by implementing the proposed algorithm on the H.264/AVC.

• Journal of Broadcast Engineering
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• v.14 no.1
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• pp.59-69
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• 2009

A bi-directional symmetric prediction technique has been developed to improve coding efficiency of B-slice and to reduce the computational complexity required to estimate two motion vectors. On the contrary to the conventional bi-directional mode which encodes both forward and backward motion vectors, it only encodes a single forward motion vector, and the missing backward motion vector is derived in a symmetric way from the forward motion vector using temporal distance between forward/backward reference frames to and from the current B picture. Since the backward motion vector is derived from the forward motion vector, it can halve the computational complexity for motion estimation, and also reduces motion vector data to encode. This technique always derives the backward motion vector from the forward motion vector, however, there are cases when the forward motion vector is better to be derived from the backward motion vector especially in scene changes. In this paper, we generalize the idea of the symmetric coding with forward motion vector coding, and propose a new symmetric coding with backward motion vector coding and adaptive selection between the conventional symmetric mode and the proposed symmetric mode based on rate-distortion optimization.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.3C
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• pp.247-254
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• 2008

H.264 provides a good coding efficiency compared with existing video coding standards, H.263, MPEG-4, based on the use of multiple reference frame for variable block size motion estimation, quarter-pixel motion estimation and compensation, $4{\times}4$ integer DCT, rate-distortion optimization, and etc. However, many modules used to increase its performance also require H.264 to have increased complexity so that fast algorithms are to be implemented as practical approach. In this paper, among many approaches, fast mode decision algorithm by skipping variable block size motion estimation and spatial-predictive coding, which occupies most encoder complexity, is proposed. This approach takes advantages of temporal and spatial properties of fast mode selection techniques. Experimental results demonstrate that the proposed approach can save encoding time up to 65% compared with the H.264 standard while maintaining the visual perspectives.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.6
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• pp.84-89
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• 2003

In this paper, we real-time implemented to the TMS320C5416 the vocoder of variable bit rate applied the SOLA-B algorithm by Henja to the ITU-T G.729A vocoder of 8kbps transmission rate. This proposed method using the SOLA-B algorithm is that it is reduced the duration of the speech in encoding and is played at the speed of normal by extending the duration of the speech in decoding. At this time, we bandied that the interval of cross correlation function if skipped every 3 sample for decreasing the computational amount of SOLA-B algorithm. The real-time implemented vocoder of C.729A and SOLA-B algorithm is represented the complexity of maximum that is 10.2MIPS in encoder and 2.8MIPS in decoder of 8kbps transmission rate. Also, it is represented the complexity of maximum that is 18.5MIPS in encoder and 13.1MIPS in decoder of 6kbps, it is 18.5MIPS in encoder and 13.1MIPS in decoder of 4kbps. The used memory is about program ROM 9.7kwords, table ROM 4.5kwords, RAM 5.1 kwords. The waveform of output is showed by the result of C simulator and Bit Exact. Also, for evaluation of speech quality of the vocoder of real-time implemented variable bit rate, it is estimated the MOS score of 3.69 in 4kbps.