• Title/Summary/Keyword: emitter

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A study on the $ALU^+$ crystalline solar cell characteristics affected by counts of rear side screen printings ($ALU^+$를 이용한 결정질 태양전지 후면 전극 Screen Printing 횟수에 따른 특성)

  • Choi, Jaewoo;Kim, Hyunyup;Yi, Junsin
    • 한국신재생에너지학회:학술대회논문집
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    • 2011.05a
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    • pp.123.1-123.1
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    • 2011
  • 기존의 p-type 태양전지 공정과 유사한 공정으로 제작되는 n-type $ALU^+$태양전지는 후면에 Al을 screen printing하여 emitter층을 형성한 구조이다. screen printing은 공정의 단순화와 제조 단가의 저비용으로 인해, metalization 공정에서 많이 쓰이고 있다. 본 연구에서는 양산 가능한 n-type $ALU^+$태양전지 제작을 위해, 후면 Al emitter 층을 single, dobule, triple로 변경하며 Al의 양을 가변하였고, 그에 따른 특성의 변화를 연구하였다. screen printing 횟수가 변경된 후면 Al emitter 층의 특성은 DIV와 LIV 측정을 통해 분석하였다. 실험 결과 Al을 single printing 하였을 때보다, double, triple printing을 통하여 Al의 양을 증가하였을 때, DIV 데이터에서 직렬저항(Rs)가 $24.44{\Omega}/cm^2$에서 $0.31{\Omega}/cm^2$으로 감소하였고, 단락전류(Jsc)는 1.26mA/$cm^2$에서 37.7mA/$cm^2$으로 약 300% 증가한 것을 확인할 수 있었다. 프린팅 횟수에 따른 LIV 데이터의 Fill Factor를 분석하게 되면, double printing이 64.35%로 54.75%의 triple printing보다 약 1.17배 더 향상된 것으로 확인하였다. 이러한 결과를 바탕으로 후면 Al emitter 형성시에 Al의 양이 적절하지 못한 이유로, Al emitter가 제대로 형성되지 못하거나 과하게 형성되면, 태양전지 내부에 누설 저항의 변화와 누설 전류의 증가로 인해, 단락전류(Jsc)와 Fill Factor 감소의 주요 원인이 된다는 것을 확인할 수 있었다.

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Fabrication of Self -aligned volcano Shape Silicon Field Emitter (음극이 자동 정렬된 화산형 초미세 실리콘 전계방출 소자 제작)

  • 고태영;이상조;정복현;조형석;이승협;전동렬
    • Journal of the Korean Vacuum Society
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    • v.5 no.2
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    • pp.113-118
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    • 1996
  • Aligning a cathode tip at the center of a gate hole is important in gated filed emission devices. We have fabricated a silicon field emitter using a following process so that a cathode and a gate hole are automatically aligned . After forming silicon tips on a silicon wafer, the wafer was covered with the $SiO_2$, gate metal, and photoresistive(PR) films. Because of the viscosity of the PR films, a spot where cathode tips were located protruded above the surface. By ashing the surface of the PR film, the gate metal above the tip apex was exposed when other area was still covered with the PR film. The exposed gate metal and subsequenlty the $SiO_2$ layer were selectively etched. The result produced a field emitter in which the gate film was in volcano shape and the cathode tip was located at the center of the gate hole. Computer simulation showed that the volcano shape and the cathode tip was located at the center of the gat hole. Computer simulation showed that the volcano shape emitter higher current and the electron beam which was focused better than the emitter for which the gate film was flat.

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The investigation of forming the n+ emitter layer for crystalline silicon solar cells (결정질 실리콘 태양전지의 n+ emitter층 형성에 관한 특성연구)

  • Kwon, Hyuk-Yong;Lee, Jae-Doo;Kim, Min-Jung;Lee, Soo-Hong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.233-233
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    • 2010
  • It is important to form the n+ emitter layer for generating electric potential collecting EHP(Electron-Hole Pair). In this paper the formation on the n+ emitter layer of silicon wafer has been made with respect to uniformity of shallow diffusion from a liquid source. The starting material was crystalline silicon wafers of resistivity $0.5{\sim}3\{Omega}{\cdot}cm$, p-type, thickness $200{\mu}m$, direction[100]. The formation of n+ emitter layer from the liquid $POCl_3$ source was carried out for $890^{\circ}C$ in an ambient of $N_2:O_2$::10:1 by volume. And than each conditions are pre-deposition and drive-in time. It has been made uniformity of at least. so, the average of sheet resistance was about 0.12%. In this study, sheet resistance was measured by 4-point prove.

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Optimizing of Diffusion Condition in Spin on Doping for c-Si Solar Cell (스핀 도핑을 이용한 단결정 실리콘 태양전지 확산 공정 최적화)

  • Yeo, In Hwan;Park, Ju Eok;Kim, Jun Hee;Cho, Hae Sung;Lim, Donggun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.5
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    • pp.410-414
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    • 2013
  • Rapid thermal processing (RTP) abruptly decreases the time required to perform solar cell processes. RTP were used to form emitter of crystalline silicon solar cells. The emitter sheet resistance is studied as a function of time and temperature. The objective of this study is reduction of doping process time with same performance. Emitter difRapid thermal dfusion was carried out by using a spin on doping and a RTP. iffusion was performed in the temperature range of $700{\sim}750^{\circ}C$ for 1m 30s~15 m. Thermal budgets yielded a $50{\Omega}/sq$ emitter using a P509 source. To reduce process time and get high efficiency, rapid thermal diffusion by IR lamp was employed in air atmosphere at $700^{\circ}C$ for 15 m.

Emitter-base geometry dependence of electrical performance of AlGaAs/GaAs HBT (에미터와 베이스의 기하구조가 AlGaAs/GaAs HBT의 전기적 특성에 미치는 영향)

  • 박성호;최인훈;최성우;박문평;김영석;이재진;박철순;박형무
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.2
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    • pp.57-65
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    • 1995
  • The effects of device geometry and layout on high speed performance such as current gain outoff frequency(f$_{T}$) and maximum oscillation frequency(f$_{max}$) are of very improtant for the scaling-down of geterojunction bipolar transistors(HBT$_{s}$). In this paper AlGaAs/GaAs HBTs are fabricated by MBE epitaxial growth and conventional mesa process, and the experimental data of emitter-base geometru dependency of HBT performance are presented in order to provide the quantitative information for optimum device structure design. It is shown that f$_{T}$ and f$_{max}$ are inversely proportional to the emiter stripe width, while the low emitter perimeter/area ratio is better to f$_{T}$ and worse ot f$_{max}$. It is also demonstrated the f$_{T}$ and f$_{max}$ are highly improved by the emitter-base spacing reduction resulting in less parsitic effects. As the result f$_{T}$ of 42GHz and f$_{max}$ of 23GHz are obtained for fabricated HBT with emitter area of 3${\times}20^{\mu}m^{2}$ and E-B spacing of 0.2$\mu$m.m.m.

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Crystalline Silicon Solar Cell with Selective Emitter Using One-step Diffusion Process (One-step diffusion으로 형성된 선택적 에미터 결정질 실리콘 태양전지에 관한 연구)

  • Jeong, Kyeong-Taek;Yang, O-Bong;Yu, Gwon-Jong;Lee, Jeong-Chul;Song, Hee-Eun
    • 한국태양에너지학회:학술대회논문집
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    • 2011.11a
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    • pp.40-44
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    • 2011
  • Recent studies in crystalline silicon solar cell fabrication have been focused on high efficiency and low cost. However, the rising of the cost results in additional processes to approach high efficiency. The fabrication process also becomes complicated with additional technologies. In this paper, we studied the selective emitter formation with phosphorous paste to improve the conversion efficiency. Selective emitter formations like two-step diffusion or etch-back method require at least one more step compared in the conventional line since heavily and lightly doped area was needed to form separately.However,one-step diffusion process is the method diffusing heavily and lightly doped area at the same time only with additional screen-printing step. This study lays the foundation for the simple way to form the selective emitter.

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The Magnetic Sensor with Lateral Field Emitter Arrays (평면구조의 전계방출형 자기 센서)

  • 남명우;김시헌;남태철
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1995.05a
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    • pp.124-128
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    • 1995
  • We have fabricated the vacuum magnetic device with a lateral field emitter arrays constructed on n-Si wafer, and investigated its magnetic characteristics. The device is consited to tip-arrayed emitter. gate and split-anode, The fabricated vacuum magnetic device has showed a good linearity of magnetic field and a high sensitivity compared with the conventional semiconductor magnetic device.

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Active control of field emitter arrays with a-Si:H TFTs (비정질 실리콘 박막 트랜지스터에 의한 전계방출기 어레이의 능동제어)

  • 엄현석;송윤호;강승열;정문연;조영래;황치선;이상균;김도형;이진호
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.33-36
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    • 2000
  • Active-controlled field emitter arrays (ACFEAs) are developed by monolithically integrating molybdenum field emitter arrays with amorphous silicon thin film transistors (a-Si:H TFTs) on glass substrate. Transfer and output characteristics of the fabricated ACFEAs showed that the emission currents of FEAs can be accurately controlled by the gate bias voltages of TFTs. Also, the emission currents of the ACFEAs kept stable without any fluctuations during the 30 min-operation.

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Investigation of Ni/Cu Solar Cell Using Selective Emitter and Plating (선택도핑에 도금법으로 Ni/Cu 전극을 형성한 태양전지에 관한 연구)

  • Kwon, Hyuk-Yong;Lee, Jae-Doo;Lee, Hae-Seok;Lee, Soo-Hong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.12
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    • pp.1010-1017
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    • 2011
  • The use of plated front contact for metallization of silicon solar cell may alternative technologies as a screen printed and silver paste contact. This technologies should allow the formation of contact with low contact resistivity a high line conductivity and also reduction of shading losses. A selective emitter structure with highly dopes regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing. When fabricated Ni/Cu plating metallization cell with a selective emitter structure, it has been shown that efficiencies of up to 18% have been achieved using this technology.

Performance Analysis of A Variable-Spacing Cesium Thermionic Energy Converter (열전변환 장치의 특성 분석에 대한 연구)

  • Lee, Deuk-Yong
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.41 no.9
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    • pp.1085-1094
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    • 1992
  • A variable-spacing cesium thermionic energy conversion test station is designed and fabricated for the study of power generation. The diode is in the form of a guard-ringed plane-parallel geometry in which a polycrystalline rhenium emitter of 2 cmS02T area faces a radiation-cooled polycrystalline rhenium collector of 1.9 cmS02T area. The emission of plasma from heated refractory electrode metal is the driving reaction in the direct conversion of heat to electricity by thermionic energy conversion. The plasma is produced from electrons and positive ions formed simultaneously by thermionic emission and surface ionization of cesium atoms incident on the hot emitter from the cesium vapor in the diode. And high plasma density causes plasma multiplication within the gap due to volume ionization that results in high power output. The variation of the saturation current of a Knudsen converter is investigated at an emitter-collector gap of 0.1 mm and an emitter temperatures. A maximum power output of 13.47 watta/cmS02T is observed at a collector temperature of 963 K and a cesium reservoir temperature of 603 K.