• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.6
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• pp.35-40
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• 2008

High performance light emitting diodes(LEDs) have been developed using GaN-based materials grown on sapphire substrates in recent years. Although these LEDs are already commercially available, we have to consider electrostatic discharge(ESD) damage related to both basic materials of diode and miniaturization of LEDs. ESD damage is one of the important parameters influencing reliability of the light emitting devices. We investigated mass production of GaN-based LEDs suffered from ESD during production process and present the solutions in order to improve the ESD problem. Most of EDS problems were controlled by using instruments properly and improvement of the process circumstances as well.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.10
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• pp.1-6
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• 2008

The holding voltage of the high-voltage MOSFETs in snapback condition is much smaller than the power supply voltage. Such characteristics may cause the latcup-like problems in the Smart Power ICs if these devices are directly used in the ESD (Electrostatic Discharge) power clamp. In this work, a latchup-free design based on the Drain-Extended PMOS (DEPMOS) adopting gate VDD structure is proposed. The operation region of the proposed gate-VDD DEPMOS ESD power clamp is below the onset of the snapback to avoid the danger of latch-up. From the measurement on the devices fabricated using a $0.35\;{\mu}m$ BCD (Bipolar-CMOS-DMOS) Process (60V), it was observed that the proposed ESD power clamp can provide 500% higher ESD robustness per silicon area as compared to the conventional clamps with gate-driven LDMOS (lateral double-diffused MOS).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.95-95
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• 2008

본 연구에서는 SiGe p-MOSFET을 제작하여 I-V 특성과 게이트 길이, $V_D$, $V_G$의 변화에 따른 저주파 노이즈특성을 측정하였다. Si 기판위에 성장한 $Si_{0.88}Ge_{0.12}$으로 제작된 SiGe p-MOSFET의 채널은 게이트 산화막과 20nm 정도의 Si Spacer 층으로 분리되어 있다. 게이트 산화막은 열산화에 의해 70$\AA$으로 성장되었고, 게이트 폭은 $25{\mu}m$, 게이트와 소스/드레인 사이의 거리는 2.5때로 제작되었다. 제작된 SiGe p-MOSFET은 빠른 동작 특성, 선형성, 저주파 노이즈 특성이 우수하였다. 제작된 SiGe p-MOSFET의 ESD 에 대한 소자의 신뢰성과 내성을 연구하기 위하여 SiGe P-MOSFET에 ESD를 lkV에서 8kV까지 lkV 간격으로 가한 후, SiGe P-MOSFET의 I-V 특성과 게이트 길이, $V_D$, $V_G$의 변화에 따른 저주파 노이즈특성 변화를 분석 비교하였다.

• Korean Chemical Engineering Research
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• v.60 no.3
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• pp.327-333
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• 2022

In this study, silicon/carbon nanotube/carbon (Si/CNT/C) composites for anode were prepared to improve the volume expansion of silicon used as a high-capacity anode material. Si/CNT were prepared by electrostatic attraction of the positively charged Si and negatively charged CNT and then hydrothermal synthesis was performed to obtain the spherical Si/CNT/C composites. Poly(vinylidene fluoride) (PVDF), polyacrylic acid (PAA), and styrene butadiene rubber (SBR) were used as binders for electrode preparation, and coin cell was assembled using 1.0 M LiPF₆ (EC:DMC:EMC = 1:1:1 vol%) electrolyte and fluoroethylene carbonate (FEC) additive. The physical properties of Si/CNT/C anode materials were analyzed using SEM, EDS, XRD and TGA, and the electrochemical performances of lithium-ion batteries were investigated by charge-discharge cycle, rate performance, dQ/dV and electrochemical impedance spectroscopy tests. Also, it was confirmed that both capacity and rate performance were significantly improved using the PAA/SBR binder and 10 wt% FEC-added electrolyte. It is found that Si/CNT/C have the reversible capacity of 914 mAh/g, the capacity retention ratio of 83% during 50 cycles and the rate performance of 70% in 2 C/0.1 C.

• Korean Chemical Engineering Research
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• v.60 no.3
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• pp.446-451
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• 2022

In this study, to improve capacity and cycle stability, the pitch coated nano silicon sheets/CNT composites were prepared through electrostatic bonding of nano silicon sheets and CNT. Silica sheets were synthesized by hydrolyzing TEOS on the crystal planes of NaCl, and then nano silicon sheets were prepared by using magnesiothermic reduction method. To fabricate the nano silicon sheets/CNT composites, the negatively charged CNT after the acid treatment was used to assemble the positively charged nano silicon sheets modified with APTES. THF as a solvent was used in the coating process of PFO pitch. The physical properties of the prepared anode composites were analysed by FE-SEM, XRD and EDS. The electrochemical performances of the synthesized anode composites were performed by current charge/discharge, rate performances, differential capacity and EIS tests in the electrolyte LiPF₆ dissolve solvent (EC:DMC:EMC = 1:1:1 vol%). It was found that the anode material with high capacity and stability could be synthesized when high composition of silicon and conductivity of CNT were used. The pitch coated nano silicon sheets/CNT anode composites showed initial discharge capacity of 2344.9 mAh/g and the capacity retention ratio of 81% after 50 cycles. The electrochemical property of pitch coated anode material was more improved than that of the nano silicon sheets/CNT composites.