• Title/Summary/Keyword: electronic packaging

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Study on Vacuum Packaging of Field Emission Display (Field Emission Display의 고진공 실장에 관한 연구)

  • Lee, Duck-Jung;Ju, Byeong-Kwon;Jang, Jin;Oh, Myong-Hwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.103-106
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    • 1999
  • In this paper, we suggest the FED packaging technology that have 4mm thickness, using sodalime glass-to-sodalime glass electrostatic bonding. It based on conventional silicon-glass bonding. The silicon film was deposited an around the exhausting hole on FED backside panel. And then, the silicon film of panel was successfully bonded with capping(bare) glass in vacuum environment and the FED panel was vacuum-sealed. In this method, we could achieve more 153 times increased conductance and 200 times increased vacuum efficiency than conventional tube packaging method. The vacuum level in panel, by SRG test, was maintained about low 10$_{-4}$ Torr during above two months And, the light emission was observed to 0.7-inch tubeless packaged FED. Then anode current was 34 $\mu$ A. Emission stability was constantly measured for 10 days.

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Development of High-Quality LTCC Solenoid Inductor using Solder ball and Air Cavity for 3-D SiP

  • Bae, Hyun-Cheol;Choi, Kwang-Seong;Eom, Yong-Sung;Kim, Sung-Chan;Lee, Jong-Hyun;Moon, Jong-Tae
    • Journal of the Microelectronics and Packaging Society
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    • v.16 no.4
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    • pp.5-8
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    • 2009
  • In this paper, a high-quality low-temperature co-fired ceramic (LTCC) solenoid inductor using a solder ball and an air cavity on a silicon wafer for three-dimensional (3-D) system-in-package (SiP) is proposed. The LTCC multi-layer solenoid inductor is attached using Ag paste and solder ball on a silicon wafer with the air cavity structure. The air cavity is formed on a silicon wafer through an anisotropic wet-etching technology and is able to isolate the LTCC dielectric loss which is equivalent to a low k material effect. The electrical coupling between the metal layer and the LTCC dielectric layer is decreased by adopting the air cavity. The LTCC solenoid inductor using the solder ball and the air cavity on silicon wafer has an improved Q factor and self-resonant frequency (SRF) by reducing the LTCC dielectric resistance and parasitic capacitance. Also, 3-D device stacking technologies provide an effective path to the miniaturization of electronic systems.

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Study on Bio-compatible Packaging Technology for Non-enzymatic Glucose Micro-sensor Applications (마이크로 사이즈의 무효소 혈당센서 응용을 위한 생체적합한 패키징 기술에 관한 연구)

  • Park, Dae-J.;Lee, Yi-J.;Park, Jae-Y.
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.280-281
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    • 2007
  • 본 논문에서는 생체 내에 삽입하거나 연속적으로 혈당을 모니터링하기 위하여 제작된 무효소 혈당세서의 바이오 패키징 및 특성 최적화에 관하여 고찰하였다. 3전극을 갖는 동일한 센서구조에서 sensitivity를 최대화하기 위해 평면형 백금전극을 사용한 센서, 메조포러스 구조가 작동전극에 형성된 센서, 메조포러스 구조가 작동전극과 보조전극에 형성된 무효소 혈당센서를 설계, 제작하고 비교하였다. 각각의 센서는 0.009${\mu}A$ $mM^{-1}cm^{-2}$, 5.46${\mu}A$ $mM^{-1}cm^{-2}$, 7.75${\mu}A$ $mM^{-1}cm^{-2}$의 sensitivity를 가졌다. 또한 생체 이식되었을 때 혈액 속에서 글루코스응답을 얻는 데에 있어 방해종인 Ascrobic Acid와 Acetaminophen의 반응을 최소화하고, 혈액 내의 단백질들이 전극에 엉겨 붙는 것을 막기 위해 생체 적합한 물질인 Nafion 을 패키징 멤브레인으로 적용하여 센서를 제작하였다. 이 센서는 0.36${\mu}A$ $mM^{-1}cm^{-2}$의 sensitivity를 가졌다.

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Implementation of Front End Module for 2.4GHz WLAN Band (2.4GHz 무선랜 대역을 위한 Front End Module 구현)

  • Lee, Yun-Sang;Ryu, Jong-In;Kim, Dong-Su;Kim, Jun-Chul;Park, Jong-Dae;Kang, Nam-Kee
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.1
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    • pp.19-25
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    • 2008
  • In this paper, the front end module (FEM) was proposed for 2.4GHz WLAN band by LTCC multilayer application. The FEM was composed of power amplifier IC, switch IC, and LTCC module. LTCC module consists of output matching circuit and lowpass filter as Tx part, bandpass filter as Rx part. Design of output matching circuit for LTCC was used matching parameter from output matching circuit based on lumped circuit on the PCB board. The dielectric constant of LTCC substrate is 9. The substrate was composed of total 26 layers with each 30um thickness. Ag paste was used for the internal pattern as the conductor material. The size of the module is $4.5mm{\times}3.2mm{\times}1.4mm$. The fabricated FEM showed the gain of 21dB, ACPR of less than -31dBc first side lobe and Less than -59dBc second side lobe and the output power of 23Bm at P1dB.

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Flip Chip Assembly Using Anisotropic Conductive Adhesives with Enhanced Thermal Conductivity

  • Yim, Myung-Jin;Kim, Hyoung-Joon;Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.1 s.34
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    • pp.9-16
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    • 2005
  • This paper presents the development of new anisotropic conductive adhesives with enhanced thermal conductivity for the wide use of adhesive flip chip technology with improved reliability under high current density condition. The continuing downscaling of structural profiles and increase in inter-connection density in flip chip packaging using ACAs has given rise to reliability problem under high current density. In detail, as the bump size is reduced, the current density through bump is also increased. This increased current density also causes new failure mechanism such as interface degradation due to inter-metallic compound formation and adhesive swelling due to high current stressing, especially in high current density interconnection, in which high junction temperature enhances such failure mechanism. Therefore, it is necessary for the ACA to become thermal transfer medium to improve the lifetime of ACA flip chip joint under high current stressing condition. We developed thermally conductive ACA of 0.63 W/m$\cdot$K thermal conductivity using the formulation incorporating $5 {\mu}m$ Ni and $0.2{\mu}m$ SiC-filled epoxy-bated binder system to achieve acceptable viscosity, curing property, and other thermo-mechanical properties such as low CTE and high modulus. The current carrying capability of ACA flip chip joints was improved up to 6.7 A by use of thermally conductive ACA compared to conventional ACA. Electrical reliability of thermally conductive ACA flip chip joint under current stressing condition was also improved showing stable electrical conductivity of flip chip joints. The high current carrying capability and improved electrical reliability of thermally conductive ACA flip chip joint under current stressing test is mainly due to the effective heat dissipation by thermally conductive adhesive around Au stud bumps/ACA/PCB pads structure.

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Application of Miniature Heat Pipe for Notebook PC Cooling (노트북 PC CPU 냉각용 소형 히트파이프 Packaging 연구)

  • Moon, Seok-Hwan;Hwang, Gunn;Choy, Tae-Goo
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.25 no.6
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    • pp.799-803
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    • 2001
  • Miniature heat pipe(MHP) with woven-wired wick was used to cool the CPU of a notebook PC. The pipe with circular cross-section was pressed and bent for packaging the MHP into a notebook PC with very limited compact packaging space. A cross-sectional area of the pipe is reduced about 30% as the MHP with 4mm diameter is pressed to 2mm thickness. In the present study a performance test has been performed in order to review varying of operating performance according to pressed thickness variation and heat dissipation capacity of MHP cooling module that is packaged on a notebook PC. New wick type was considered for overcoming low heat transfer limit when MHP is pressed to thin-plate. The limiting thickness or pressing is shown to be within the range of 2mm∼2.5mm through the performance test with varying the pressing thickness. When the wall thickness of 0.4mm is reduced to 0.25mm for minimizing conductive thermal resistance through the wall of heat pipe, heat transfer limit and thermal resistance of MHP were improved about 10%. In the meantime, it is shown that the thermal resistance and heat transfer limit for the MHP with central wick type are higher than those of MHP with existing wick types. The results of performance test for MHP cooling modules with woven-wired wick to cool a notebook PC shows the stability as cooling system since T(sub)j(Temperature of Processor Junction) satisfy a demand condition of 0∼100$\^{C}$ under 11.5W of CPU heat.