• 마이크로전자및패키징학회지
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• 제21권2호
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• pp.53-57
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• 2014

Thin glass (< 100 microns) is a promising material from which advanced interposers for high density electrical interconnects for 2.5D chip packaging can be produced. But thin glass is extremely brittle, so mechanical micromachining to create through glass vias (TGVs) is particularly challenging. In this article we show how laser processing using deep UV excimer lasers at a wavelength of 193 nm provides a viable solution capable of drilling dense patterns of TGVs with high hole counts. Based on mask illumination, this method supports parallel drilling of up over 1,000 through vias in 30 to $100{\mu}m$ thin glass sheets. (We also briefly discuss that ultrafast lasers are an excellent alternative for laser drilling of TGVs at lower pattern densities.) We present data showing that this process can deliver the requisite hole quality and can readily achieve future-proof TGV diameters as small $10{\mu}m$ together with a corresponding reduction in pitch size.

• 마이크로전자및패키징학회지
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• 제21권2호
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• pp.23-29
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• 2014

Less power consumption, lower cost, smaller size and more functionality are the increasing demands for consumer electronic devices. The three dimensional(3-D) TSV packaging technology is the potential solution to meet this requirement because it can supply short vertical interconnects and high input/output(I/O) counts. Cu(Copper) has usually been chosen to fill the TSV because of its high conductivity, low cost and good compatibility with the multilayer interconnects process. However, the CTE mismatch and Cu ion drift under thermal stress can raise reliability issues. This study discribe the thermal stress reliability trend for successful implementation of 3-D packaging.

• 마이크로전자및패키징학회지
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• 제18권1호
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• pp.7-13
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• 2011

According to increasing of data transfer rate, printed circuit board (PCB) is required improvement of transmission speed. Optical PCB and its packaging technology can be one of the solutions that overcome the limitations of conventional electrical PCB. The data transmission capacity will be increased 10 Tbps at 2015. To this end, studies on various OPCB technologies are being conducted. For cost-effective and high- performance OPCB, studies of optical coupling by polymer replication process are conducted. In this work, optical waveguide and optical fiber array block were sequentially fabricated by polymer pattern replication method. Using this method we successfully demonstrate low loss optical fiber coupling between optical waveguide and optical fiber arrays. And researches on flip chip bonding process and using electro-optic connectors for packaging are conducted.

• 반도체디스플레이기술학회지
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• 제3권3호
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• pp.5-9
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• 2004

A new wafer level packaging scheme is presented as an alternative to MEMS package. The proof-of-concept structure is fabricated and evaluated to confirm the feasibility of the idea for MEMS wafer level packaging. The scheme of this work is developed using an electroplated tin (Sn) solder. The critical difference over conventional ones is that wafers are laterally bonded by solder reflow after LEGO-like assembly. This lateral bonding scheme has merits basically in morphological insensitivity and its better bonding strength over conventional ones and also enables not only the hermetic sealing but also its electrical interconnection solving an open-circuit problem by notching through via-hole. The bonding strength of the lateral bonding is over 30 Mpa as evaluated under shear and the hermeticity of the encapsulation is 2.0$\times10^{-9}$mbar.$l$/sec as examined by pressurized Helium leak rate. Results show that the new scheme is feasible and could be an alternative method for high yield wafer level packaging.

• 펄프종이기술
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• 제35권2호
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• pp.52-57
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• 2003

The charcoal is known to have gas adsorption capability and electrical properties. Some practical applications of carbon materials for the purpose of limited electrical conduction were made in these days. In this paper, we applied the several different kinds of charcoal to the papers in three different ways to investigate if charcoal application method affects its electrical conduction capability. Wet end addition, making multiply, and coating method were tested. The area electrical resistivity of charcoal containing paper was measured. The strength properties of charcoal containing paper were compared to those of the control, which had no charcoal in it. Experimental results showed that manufacturing conditions of the charcoal itself changed its electrical and strength properties of charcoal containing paper. The electrical properties of charcoal containing paper can be used for the removal of electrostatic problem in packaging system. The strength property of the charcoal containing paper should be kept, at least, over the minimum requirement for the packaging system. By using coating method on paper or making multiply, strength loss of paper by inclusion of charcoal could be overcome.

• ETRI Journal
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• 제33권5호
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• pp.802-805
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• 2011

This letter presents a K-band polarization reconfigurable antenna integrated with a silicon radio frequency MEMS switch into the form of a compact package. The proposed antenna can change its state from linear polarization (LP) to circular polarization (CP) by actuating the MEMS switch, which controls the configuration of the coupling ring slot. Low-loss quartz is used for a radiating patch substrate and at the same time for a packaging lid by stacking it onto the MEMS substrate, which can increase the system integrity. The fabricated antenna shows broadband impedance matching and exhibits high axial ratios better than 15 dB in the LP and small axial ratios in the CP, with a minimum value of 0.002 dB at 20.8 GHz in the K-band.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2002년도 춘계 기술심포지움 논문집
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• pp.180-182
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• 2002

Copper thin films are prepared by a chemical vapor deposition technology for multi-level metallzations in ULSI fabrication. The copper films were deposited on TiN/Si substrates in helium atmosphere with the substrate temperature between $120^{\circ}C$ and $300^{\circ}C$. In order to get more reliable metallizations, effects on the post-annealing treatment to the electrical properties of the copper films have been investigated. The Cu films were annealed at the $5\times$10^{-6}$ Torr vacuum condition, and the electrical resistivity and the nano-structures were measured for the Cu films. The electrical resistivity of Cu films shown to be reduced by the post-annealing. The electrical resistivity of 2.2 $\mu$$\Omega$.cm was obtained for the sample deposited at the substrate temperature of $180^{\circ}C$ after vacuum annealed at $300^{\circ}C$. The resistivity variations of the films was not exactly matched with the size of the nato-structures of the copper grains, but more depended on the deposition temperature of the copper films.

• 마이크로전자및패키징학회지
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• 제24권4호
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• pp.91-95
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• 2017

Package-On-Package (PoP) technology is developing toward smaller form factors with high-speed data transfer capabilities to cope with high DDR4x memory capacity. The common application processor (AP) used for PoP devices in smartphones has the bottom package as logic and the top package as memory, which requires both thermally and electrically enhanced functions. Therefore, it is imperative that PoP designs consider both thermal and power distribution network (PDN) issues. Stacked packages have poorer thermal dissipation than single packages. Since the bottom package usually has higher power consumption than the top package, the bottom package impacts the thermal budget of the top package (memory). This paper investigates the thermal and electrical characteristics of PoP designs, particularly the bottom package. Findings include that via and dense via-cluster volume have an important role to lower thermal resistance to the motherboard, which can be an effective way to manage chip hot spots and reduce the thermal impact on the memory package. A Cu block and dense via-cluster layout with an optimal location are proposed to drain the heat from the chip hot spots to motherboard which will enhance thermal and electrical performance at the design stage. The analytical thermal results can be used for design guidelines in 3D packaging.

• 한국전기전자재료학회논문지
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• 제30권3호
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• pp.170-174
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• 2017

In 3 electrode reflective displays using a plastic substrate, unstable packaging induces particle clumping and optical degradation due to external air inflow and electronic ink evaporation. In this work, we fabricate 3 electrode electronic paper using glass wafer, ITO/plastic film, and ITO/glass/gas barrier film as an upper substrate after injecting electronic ink onto the lower substrate. Then, we studied its properties. After operating under stress conditions for 336 hours at $85^{\circ}C$ and 75% humidity, the reflectivity of driven e-paper panels with white color was 25.5% for the panels using glass wafer, 22.5% for plastic film including a gas barrier layer, and 16% for plastic film only. From these optical properties, we conclude that gas barrier film improves upper film isolation as a desirable packaging method.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.212-212
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• 2008

에폭시 수지는 화학적 열적 안정성과 절기 절연성 및 기계적 특성 등 여러 가지 우수한 특성에도 불구하고 난연성은 그 단독으로 만족시킬 수 없기 때문에 난연제를 첨가함으로써 난연효과를 얻어왔다. 기존에 할로겐 화합물인 브롬계 난연제는 우수한 난연효과에도 불구하고 연소시 유해물질이 발생되어진다. 그리하여 인계 난연제를 첨가하는 것이 고분자 시스템에 난연성을 부여하는 효과적인 수단으로 대두되어지고 있다. 이 실험에서는 인계 난연제와 브롬계 난연제를 10, 20, 30, 40wt% 첨가하여 epoxy composite 제작하였다. 제작된 epoxy composite를 UL-94V 방법으로 난연성 평가하여 브롬계 난연제 20wt%에서 V-0를 획득할 수 있었으나 인계난연제 40wt%에서도 V-0를 만족할 수 없었다. 난연제 함량에 따른 Dielelctric constant 및 loss는 브롬계 난연제를 첨가시 감소하였고, 인계난연제의 경우 증가하였다.