• Title/Summary/Keyword: division by zero

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REMARKS ON GROUP EQUATIONS AND ZERO DIVISORS OF TOPOLOGICAL STRUCTURES

  • Seong-Kun Kim
    • East Asian mathematical journal
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    • v.39 no.3
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    • pp.349-354
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    • 2023
  • The motivation in this paper comes from the recent results about Bell inequalities and topological insulators from group theory. Symmetries which are interested in group theory could be mainly used to find material structures. In this point of views, we study group extending by adding one relator which is easily called an equation. So a relative group extension by a adding relator is aspherical if the natural injection is one-to-one and the group ring has no zero divisor. One of concepts of asphericity means that a new group by a adding relator is well extended. Also, we consider that several equations and relative presentations over torsion-free groups are related to zero divisors.

Zero-Voltage Switching Dual Inductor-fed DC-DC Converter Integrated with Parallel Boost Converter

  • Seong, Hyun-Wook;Park, Ki-Bum;Moon, Gun-Woo;Youn, Myung-Joong
    • Proceedings of the KIPE Conference
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    • 2008.06a
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    • pp.523-525
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    • 2008
  • Novel zero-voltage switching(ZVS) dual inductor-fed DC-DC converter integrating a conventional dual inductor-fed boost converter(DIFBC) and a parallel bidirectional boost converter has been proposed. Most of current-fed type boost topologies including dual inductor schemes have crucial defects such as a high voltage spike on the main switch when it comes to turning off, an unattainable soft start-up due to the limited range of duty ratio, above 50%, and considerable switching losses due to the hard switching. By adding two auxiliary switches and an output capacitor on the conventional DIFBC, the proposed circuit can solve mentioned problems and improve the efficiency with simple methods. The operational principle and theoretical analysis of the proposed converter have been included. Experimental results based on a 42V input, 400V/1A output and 50kHz prototype are shown to verify the proposed scheme.

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New Secondary Battery Charger/Discharger Available for Zero Voltage Discharge (영전압 방전이 가능한 새로운 방식의 2차전지 충방전기)

  • Chung, Dae-Taek;Chae, Soo-Yong;Hong, Soon-Chan
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.26 no.11
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    • pp.62-74
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    • 2012
  • This paper proposes a new secondary battery charger/discharger available for zero voltage discharge which is used for test equipments and formation process. The proposed system is a switching type converter, and thus the system is high efficiency and more compact as compared with linear type charger/discharger. Conventional switching type charger/discharger can not discharge secondary batteries to zero voltage because of voltage drops in the switching elements and long distributing line(typically 10m). However, the proposed system is able to discharge the battery to zero voltage in constant current mode regardless of the voltage drops. In this paper, we analyze the proposed charger/discharger and the validity of the system is verified by simulation and experiment.

Multipath Matching Pursuit Using Prior Information (사전 정보를 이용한 다중경로 정합 추구)

  • Min, Byeongcheon;Park, Daeyoung
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.6
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    • pp.628-630
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    • 2016
  • Compressive sensing can recover an original sparse signal from a few measurements. Its performance is affected by the number of non-zero elements in the signal. The knowledge of partial locations of non-zero elements can improve the recovery performance. In this paper, we apply the partial location knowledge to the multipath matching pursuit. The numerical results show it improves the signal recovery performance and the channel estimation performance in the ITU-VB channel.

Performance Analysis of Multiuser MIMO Systems with Zero Forcing Receivers (Zero Forcing 수신기를 결합한 다중사용자 다중안테나 시스템의 성능 분석)

  • Sung, Chang-Kyung;Moon, Sung-Hyun;Park, Eun-Sung;Lee, In-Kyu
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.8A
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    • pp.592-599
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    • 2009
  • In this paper, we consider multiuser multi-input/multi-output antenna systems with zero-forcing receivers in downlink. In this case, to exploit multiuser diversity, spatial-division multiple access (SDMA) system allows to assign different users to a part of transmit antennas at the base station whereas spatial-division multiplexing (SDM) system assigns all antennas to single user's data stream. In this paper, we present analytical frameworks to evaluate performance of these systems. We first analyze the performance of these two systems by deriving closed-form expressions of achievable throughput. Numerical results show that the derived expressions are very tight. In addition, we approximate the capacity expression of SDM and SDMA systems and compare the SDM with the optimal case.

ZVS Operating Range Extension Method for High-Efficient High Frequency Linked ZVS-PWM DC-DC Power Converter

  • Sato S.;Moisseev S.;Nakaoka M.
    • Proceedings of the KIPE Conference
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    • 2003.07a
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    • pp.227-230
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    • 2003
  • In this paper, a full bridge edge-resonant zero voltage mode based soft-switching PWM DC-DC power converter with a high frequency center tapped transformer link stage is presented from a practical point of view. The power MOSFETS operating as synchronous rectifier devices are implemented in the rectifier center tapped stage to reduce conduction power losses and also to extend the transformer primary side power MOSFETS ZVS commutation area from the rated to zero-load without a requirement of a magnetizing current. The steady-state operation of this phase-shift PWM controlled power converter is described in comparison with a conventional ZVS phase-shift PWM DC-DC converter using the diodes rectifier. Moreover, the experimental results of the switching power losses analysis are evaluated and discussed in this paper. The practical effectiveness of the ZVS phase-shift PWM DC-DC power converter treated here is actually proved by using 2.5kW-32kHz breadboard circuit. An actual efficiency of this converter is estimated in experiment and is achieved as 97$\%$ at maximum.

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A Study of Zero Energy Building Verification with Measuring and Model-based Simulation in Exhibition Building

  • Ha, Ju-wan;Park, Kyung-soon;Kim, Hwan-yong;Song, Young-hak
    • Architectural research
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    • v.20 no.3
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    • pp.93-102
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    • 2018
  • With the change in Earth's ecosystems due to climate change, a number of studies on zero energy buildings have been conducted globally, due to the depletion of energy and resources. However, most studies have concentrated on residential and office buildings and the performance predictions were made only in the design phase. This study verifies the zero-energy performance in the operational phase by acquiring and analyzing data after the completion of an exhibition building. This building was a retention building, in which a renewable energy system using a passive house building envelope, solar photovoltaic power generation panels, as well as fuel cells were adopted to minimize the maintenance cost for future energy-zero operations. In addition, the energy performance of the building was predicted through prior simulations, and this was compared with actual measured values to evaluate the energy performance of the actual operational records quantitatively. The energy independence rate during the measurement period of the target building was 123% and the carbon reduction due to the energy production on the site was 408.07 tons. The carbon reduction exceeded the carbon emission (331.5 tons), which verified the carbon zero and zero-energy performances.

Design and Implementation of a Near Zero IF Sub-harmonic Cascode FET Mixer for 2.4 GHz WLL Base-Station (Near Zero IF를 갖는 2.4 GHz WLL 기지국용 하모닉 Cascode FET 혼합기 설계 및 제작)

  • Lee, Hyok;Jeong, Youn-Suk;Kim, Jeong-Pyo;Choi, Jea-Hoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.5
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    • pp.472-478
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    • 2003
  • In this paper, a near zero If mixer was designed in cascode structure by using two single-gate FETs. Since it is driven by the second order harmonic of LO signal, a sub-harmonic cascode FET mixer has good LO-RF port isolation characteristic. In order to solve DC offset of a homodyne system, near zero If is used instead of zero If and the mixer is driven by sub-harmonic of LO signal. As RF input power was -30 dBm and LO power was 6 dBm, the designed mixer had 6.7 dB conversion gain, 8.4 dB noise figure, 31.5 dB LO-RF port isolation, -1.9 dBm lIP3 and -2.8 dBm IIP2.

2.5MHz Zero-Voltage-Switching Resonant Inverter for Electrodeless Fluorescent Lamp (2.5MHz급 무전극 램프 구동용 ZVS 인버터에 관한 연구)

  • Park, D.H.;Kim, H.J.;Joe, K.Y.;Kye, M.H.
    • Proceedings of the KIEE Conference
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    • 1996.11a
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    • pp.339-342
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    • 1996
  • Driving the electrodeless fluorescent lamp, the high ac voltage with high frequency is required. The linear power amplifier has been widely used as a driving circuit of electrodeless fluorescent lamp. However, the low efficiency of the power amplifier causes the driving circuit to be replaced by a PWM switching inverter. In order to use a PWM switching inverter as the driving circuit of an electrodeless fluorescent lamp, the high switching frequency is required. But due to the switching loss at switches of the inverter, the limitation of high switching frequency appears in the inverter. One solution to this limitation is to reduce the switching loss by using the zero voltage switching technique. In this paper, zero voltage switching resonant inverter for driving an electrodeless fluorescent lamp is discussed. The results of analysis about the inverter are presented and the equations for design are established. And the validity of the analyzed results are verified through the experiment.

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Sparse Matrix Compression Technique and Hardware Design for Lightweight Deep Learning Accelerators (경량 딥러닝 가속기를 위한 희소 행렬 압축 기법 및 하드웨어 설계)

  • Kim, Sunhee;Shin, Dongyeob;Lim, Yong-Seok
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.17 no.4
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    • pp.53-62
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    • 2021
  • Deep learning models such as convolutional neural networks and recurrent neual networks process a huge amounts of data, so they require a lot of storage and consume a lot of time and power due to memory access. Recently, research is being conducted to reduce memory usage and access by compressing data using the feature that many of deep learning data are highly sparse and localized. In this paper, we propose a compression-decompression method of storing only the non-zero data and the location information of the non-zero data excluding zero data. In order to make the location information of non-zero data, the matrix data is divided into sections uniformly. And whether there is non-zero data in the corresponding section is indicated. In this case, section division is not executed only once, but repeatedly executed, and location information is stored in each step. Therefore, it can be properly compressed according to the ratio and distribution of zero data. In addition, we propose a hardware structure that enables compression and decompression without complex operations. It was designed and verified with Verilog, and it was confirmed that it can be used in hardware deep learning accelerators.