• Title/Summary/Keyword: display driving

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A Study on the Effect of Space Charge on the Display Discharge of Plasma Display Panel (플라즈마 디스플레이 패널의 표시방전에 미치는 공간전하의 영향에 관한 연구)

  • Ryeom, Jeong-Duk
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.7
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    • pp.14-20
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    • 2006
  • The discharge characteristics for the reset period of sustain pulses of display discharge in address overlapped display driving methode is studied. It has been understood that the display discharge is strongly influenced of not only the wall charge but also the space charge from the experiment result. The first display discharge which comes out exactly after the rest periods strongly depends on the width of the reset period and as for the second display discharge, the dependancy of it is very low. Even if the first display discharge is a little insufficient if the wall charge is accumulated enough, the second display discharge can be stably induced. However, considering the influence of the space charge, it is preferable within the width of $30[{\mu}s}]$ of the reset period. When the rest period is up to $30[{\mu}s}]$, the uniform voltage operation margin of the display discharge of about 12[V] was obtained.

An Analysis of Particle-clumping Phenomena of a Charged Particle-type Reflective Electronic Display

  • Kim, Young-Cho
    • Transactions on Electrical and Electronic Materials
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    • v.13 no.4
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    • pp.212-214
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    • 2012
  • Both the electrically positive and negative particles in a cell of quick response-liquid powder display (QR-LPD) are surrounded by conductive electrodes on the upper and lower substrate and the dielectric materials of the barrier ribs. Particles in a cell are attached to or detached from the other materials by image force, electric field, Coulomb's force, and Van der Waals' force. Through these forces, the moving particles form an image but induce clumping phenomena. Particles having a large kinetic energy by a large q/m value crash into the opposite electrode with high speed at a large driving voltage and quickly lose electrically charged material. As a result, these particles are clumped and degrade panel performance. The clumped particles in a cell are observed by microscopic photographs and ascertained by a response time. When the bias voltage is increased to 0.68-0.76 $V/{\mu}m$, particle clumping occurs abruptly and the response time increases sharply. This particle clumping is similarly observed after the number of driving times at the driving voltage (0.42-0.64 $V/{\mu}m$).

A Study of the Effect using Ramp Waveform on the Address Period of Address Display Separated Operating in ac Plasma Display Panel (AC-PDP의 ADS 구동방식에서 어드레스 구간에 기울기파를 사용한 효과에 관한 연구)

  • Joung, Bong-Kyu;Kim, Ji-Sun;Kwon, Shi-Ok;Hwang, Ho-Jung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.2
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    • pp.180-186
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    • 2005
  • As a driving method of AC-PDP, Address-Display Separated(ADS) driving has been widely adopted for its simple architecture and low discharge failure rate. However, a high definition like a HDTV has defect of long addressing time by reason of a number of pixels. Priming effect isn't fully sustained because of long addressing time during the address period. Therefore, it has different wall charge and luminance of each addressing time in the sustain period. In this study, we suggest a new driving waveform on the address period to improve these defects. We applied a ramp waveform, instead of a square waveform, to an address period in ADS, for operating on the AC-PDP, which used the conventional gas [He-Ne-Xe]. When the ramp waveform is applied to the address period, we experimented for uniform wall charge and the improved luminance by sustained Priming effect at each addressing time in the sustain period.

Studies on High Speed Addressing Driving Scheme using the Priming Effect in Plasma Display Panel (하전 입자 효과를 이용한 Plasma Display Panel의 고속 구동 파형에 관한 연구)

  • Shin, Bhum-Jae;Park, Sang-Sik
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.23 no.2
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    • pp.45-52
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    • 2009
  • This study is related to the realization of high speed address driving method for Full-HD PDP. The new self-priming addressing(SPA) driving scheme was proposed to improve an address discharge time lag, which utilizes the priming effect maintaining the priming discharge during an address period. In this study, the basic characteristics of the priming ramp discharge were investigated and optimize the reset pulse and priming pulse. It is noted that the address discharge time lag is significantly improved from 1.2[${\mu}s$] to 0.8[${\mu}s$] when the slope of the priming ramp pulse is below 0.1[$V/{\mu}s$].

Design and Implementation of Low-Voltage and Lour-Power Driving Method for Plasma Display Panel (저 전압, 저 전력 Plasma Display Panel 구동 회로의 설계 및 구현)

  • Kim, Sang-Bong;Choi, Jin-Ho;Jang, Yun-Sepk
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.601-604
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    • 2004
  • In this paper, we propose a driving circuit that can be operated with a lower voltage than that of the conventional circuit without reducing the discharge voltage. the circuit proposed in this paper has a merit to improve the electrical characteristics because it can be composed of switching devices with low voltage. The operation and efficiency using real devices. The features of the circuit proposed in this paper are as follows; the power loss can be decreased by the use of low voltage, the cost if the driving circuit for PDP can be reduced by the use of switching devices operated with low voltage.

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Improved Waveform during the Addressing Period for the Improvement of the Addressing Time for AC PDPs

  • Lim, Jong-Sik;Kim, Hyun-Seok;Kim, Joon-Yub
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.511-514
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    • 2004
  • ADS(Address Display period Separation) driving method has been considered to be the most appropriate driving technique for AC PDPs. However when the ADS driving method is applied to the high-resolution AC PDP, the required long addressing time often becomes a problem. In this paper, we present a new waveform for reducing the addressing time and for the stable addressing discharge. In this new waveform, a wall charge acceleration pulse is applied to the common electrode right after 80us scan time. In this way, the charge generated by the addressing discharge is accelerated to the electrodes. Experiments using the wall charge acceleration pulse showed that we could stably address an AC PDP with the scan pulses having pulse width of 1 us

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2-Dimensional Spatial Averaging Driving Methods for High Speed Driving of AMLCDs

  • You, Bong-Hyun;Lee, Jun-Pyo;Kim, Dong-Gyu;Park, Jin-Ho;Kim, Yun-Jae;Berkeley, Brian H.;Kim, Sang-Soo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1323-1326
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    • 2007
  • A new driving method employing 2-dimensional spatial averaging is proposed. This method successfully eliminates the vertical line artifact caused by luminance difference from unbalanced charging voltage between polarities. This spatial averaging method can secure charging time, minimize driver heating, and achieve higher display quality.

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Threshold voltage influence reduction and Wide Aperture ratio in Active Matrix Orgnic Light Emitting Diode Display (AMOLED(active matrix organic light emitting diode) 의 문턱전압 보상과 화소구조에 대한 연구)

  • 김정민;곽계달;신흥재;최성욱
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.257-260
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    • 2002
  • This paper describes the pixel of AMOLED(act ive matrix organic light emitting diode) driving circuit by poly-sl technology. The area per pixel is 278um$\times$278um in 120$\times$160(2.2 inch) Driving the OLEDS with active matrix leads to the lower voltage operation, the lower peak pixel currents and the display with much greater efficiency and brightness The role of the active matrix is to provide a constant current throughout the entire frame time and is eliminating the high currents encountered In the passive matrix approach, This design can support the high resolutions expected by the consumer because the current variation specification is norestricted. The pixel has been designed driving TFT threshold voltage cancellation circuit and wide aperture ratio circuit that communizes 4 pixel. The test simulation results and layout are 11% per threshold-current var Eat ion and 12.5% the aperture ratio of increase.

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A New Driving Scheme for Reduction of Addressing time and its Dispersion in AC PDP

  • Lee, Sung-Hyun;Kim, Dong-Hyun;Park, Cha-Soo;Park, Chung-Hoo;Ryu, Jae-Hwa
    • Journal of Information Display
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    • v.2 no.2
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    • pp.39-44
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    • 2001
  • The conditions of the wall charges and priming particles in a unit discharge cell in AC PDP seriously affect the addressing discharge characteristics in the driving method with ramped setup pulse. Moreover, the discharge conditions at the end of the scan line may be different from the first scan line because of the difference of about 1ms address time. Consequently, the addressing time and its dispersion may be different for any two discharge cells that lead to misfiring and the increase in the total addressing time. In order to improve the addressing time and its dispersion, we have applied different addressing voltage at each cell such as progressively increase pulse voltage instead of constant one. As a result, the addressing time and its dispersion of all cells were improved by about 30% compared with the conventional driving method.

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Effects of Forced Self Driving Function in Silicon Wafer Polishing Head on the Planarization of Polished Wafer Surfaces (실리콘 웨이퍼 연마헤드의 강제구동 방식이 웨이퍼 연마 평탄도에 미치는 영향 연구)

  • Kim, Kyoungjin;Park, Joong-Youn
    • Journal of the Semiconductor & Display Technology
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    • v.13 no.1
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    • pp.13-17
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    • 2014
  • Since the semiconductor manufacturing requires the silicon wafers with extraordinary degree of surface flatness, the surface polishing of wafers from ingot cutting is an important process for deciding surface quality of wafers. The present study introduces the development of wafer polishing equipment and, especially, the wafer polishing head that employs the forced self-driving of installed silicon wafer as well as the wax wafer mounting technique. A series of wafer polishing tests have been carried out to investigate the effects of self-driving function in wafer polishing head. The test results for wafer planarization showed that the LLS counts and SBIR of polished wafer surfaces were generally improved by adopting the self-driven polishing head in wafer polishing stations.