• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.6
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• pp.27-33
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• 1984

This paper is an experimental gaudy on the digital hardware implementation of the R2-MF Receiver for 32 channel configurations used in signalling systems between ESS. There are many methods to detect MF signal by DSP techniques, but the requirement for MF detection needs not sharp frequency response, needs only decision about some specific frequencies exist or not at discrete frequency sampling points. The hardware used to implement this algorithm is Am 2900 series "bit-slice microprocessor" chips based on the microprogramming techniques for real time signal processing. And we used the additional Z-80A processor chips for the system control and the decision about which is the right MF signal from the detected MF spectrums. Hence we could enhance the flexibilities of the hardware and the software, this leads that this system is well suits for signalling systems used in TDM ESS.n TDM ESS.

• Proceedings of the KIEE Conference
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• 2003.07c
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• pp.1861-1863
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• 2003

최근 국내 전력시장은 초고압 대전력기기 사용이 현저히 증가하고 있어 이에 따라 부분방전 예방진단 시스템의 필요성은 절대적이며 이러한 시스템의 국산화가 절실히 요구되고 있다. 예방 진단 시스템의 국산화에 있어 부분방전 신호 측정시 신호 대 잡음비(Signal to Noise ratio)를 높이기 위해 측정용 센서의 검출가능 주파수 대역을 높게 설정하여 설계되고 있는데, 따라서 센서에서 검출된 신호를 처리하기 위한 로컬유닛 또한 국산화시 외국 시스템보다 더욱 신뢰성을 가질 수 있도록 설계되어야 한다. 이를 위해서는 기존의 마이크로프로세서를 채용한 저속 시스템을 대체할 수 있도록 더욱 빠르고 높은 신뢰성의 디지털 신호처리 기술이 요구된다. 본 논문에서는 검출 센서의 아날로그 신호를 빠르게 디지털화 한 후 보다 정확한 데이터와 독립적 신호처리 그리고 네트워크를 통한 실시간 전송을 수행할 수 있는 부분방전 예방진단 시스템 로컬유닛의 프로토타입을 Digital Signal Processor (DSP)를 이용하여 구현하였다. 제작된 DSP 로컬유닛을 시험하기 위해 Real-Scale 170kV GIS Mock-up에서 부분방전 신호를 발생 시키고 센서를 통해 검출된 신호를 DSP가 처리하여 사용자의 네트워크를 통한 명령에 따른 실시간 전송모드, ${\Phi}$-q-n 진단모드로 자체 네트워크 기능을 이용하여 사용자에게 데이터를 실시간 전송하도록 하였다. 본 논문에서 구현한 DSP 로컬유닛은 대전력기기 부분방전 예방진단 시스템의 국산화에 있어 기존의 외국 시스템의 로컬유닛보다 구성이 간단하며, 실시간 신호처리 및 원거리 데이터 전송기능에서 우수한 성능을 보였다. 향후 연구에서는 다양한 분석 알고리즘을 탑재한 DSP를 개발하여 더욱 향상된 실시간 데이터 전송 및 분석기능이 우수한 DSP 로컬유닛을 개발하고자 한다.

• The Journal of the Acoustical Society of Korea
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• v.16 no.2
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• pp.80-88
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• 1997

In this paper, the implementation of audio/data processor using ETRI DSP to support analog mode in digital/analog dual mode mobile phone is presented. Audio/data processor performs the wideband data processing, audio signal processing, demodulation function, and data rate conversion when it is operated in analog mode. These functions are programmed in assembly language, and then loaded to ETRI DSP together with vocoder program for the digital mode operation. This is a very efficient implementation of the dual mode cellular phone ASIC since the vocoder for the digital mode and audio/data processor for the analog mode are programmed together in the same hardware.

• International Journal of Highway Engineering
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• v.15 no.6
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• pp.41-47
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• 2013

PURPOSES : The purpose of this study is about noise which is generated from roads and is consist of irregular frequency variation from low frequency to various band. The existing methods of noise reduction are sound barrier that uses insulation material and absorbing material or have applied passive technology of noise reduction by devices. The total frequency band is needed to apply active noise control. METHODS : In this study applies to the field of road traffic environment, signal processing controller and various analog signal input/output, the amplifier module is based on parallel-core embedded processor designed. DSP performs the control algorithm of the road traffic noise. Noise sources in the open space performance of evaluation were applied. In this study, controller of active signal processor was designed based on the module of audio input/output and main controller of embedded process. The controller of active signal processor operates noise reduction algorithm and performance tests of noise reduction in inside and outside environment were executed. RESULTS : The signal processing controller with OMAP-L137 parallel-core processors as the center, DSP processors in the active control operations dealt with quickly. To maximize the operation speed of an object and ARM processor is external function keys and display for functions and evaluating the performance management system was designed for the purpose of the interface. Therefore the reduction of road traffic noise has established an electronic controller-based noise reduction. CONCLUSIONS : It is shown that noise reduction is effective in the case of pour tonal sound and complex tonal sound below 500Hz by appling to Fx-LMS.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.09a
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• pp.34-37
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• 2001

This research suggested the new algorithm controlled by micro processor which is already stored by various PWM form of output voltage by using fundamental data of the carrier and signal. The determined PWM pattern is not concerned with the signal wave form and the new algorithm can obtain the desired pulse width by synchronous of carrier. The PWM wave can be controlled with real time by using extra hardware and digital software and to speed up program processing, the control signals to switch the power semi-conductor of three phase PWM inverter, simultaneously use the output signal by microprocessor and extra hardware, and control signal by software. In the end, this method was proved by applying to Three phase voltage source inverter.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.49 no.1
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• pp.48-53
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• 2000

In this paper, we develop a TMS320C31 (60MHz) digital signal processor (DSP) board to synthesize gradient waveforms for Spiral Scan Imaging (SSI), which is one of the ultra fast magnetic resonance imaging (MRI) methods widely used. In SSI, accurate gradient waveforms are very essential to high quality magnetic resonance images. For this purpose, sampling rate for synthesizing the gradient waveforms is set twice as high as the data sampling rate. With the developed DSP boards accurate gradient waveforms are obtained. Ultra fast spiral scan imaging with the developed with the developed DSP board is currently under development.

• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.110-112
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• 2000

Recently, the interest and the importance of the signal monitoring and recording during sleep is increasing. Conventional paper based recording systems are being replaced by digital type and polysomnographic system. We developed special digital signal processor system for the polysomnographic recording. This system consists of digital signal processing part and PC interface part for user's convenience. This system includes two digital filters, one fur low pass filtering of high frequency noise and the other for notch filtering of 60Hz AC noise. This system can be used for the efficient and convenient measurement of polysomnographic signals and also can be developed for the portable use.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.2
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• pp.63-70
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• 2003

In this paper, an MFC (Mass Flow Controller) which is widely used in many semiconductor manufacturing processes for controlling the mass flow rate of a gas is designed and implemented using the PIC 16F876 of Microchip, Inc. The MFC implemented in this thesis has the form of hybrid-type, i.e., the mixed-type of the analog-type MFC, which has many problems such as low accurary, and digital-type MFC, which use an expensive DSP (Digital Signal Processor) and an ADC (Analog to Digital Convertor) with high precision. The MFC is consists of the sensor unit, the control unit and the actuator unit, and it has used the automatic calibration algorithm and the reference table method for the improvement of the performance.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1655-1666
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• 2015

This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

• Journal of Advanced Navigation Technology
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• v.3 no.1
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• pp.52-59
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• 1999

Digital microwave wideband receiver including linear amplifier, analog-to-digital converter(ADC) and digital signal processor is able to analyze its performance using sensitivity and dynamic range of system. Determination of gain, third-order intermodulation products and ADC characteristics and design criteria for the linear amplifier chain is essential problem for sensitive and dynamic range. Also, if there are two signals with frequencies very close, digital signal processor must be able to separate the two signals. In this paper, we measured dynamic range as gain was changed and determined gain value for the proper sensitivity and dynamic range and high resolution spectrum estimation was used to separate two close signals.