• Title/Summary/Keyword: digital delays

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IoT-ENABLED MANUFACTURING SYNCHRONIZATION FOR E-COMMERCE

  • Alkhunaizan, Abdulmohsin Suliman
    • International Journal of Computer Science & Network Security
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    • v.21 no.6
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    • pp.269-274
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    • 2021
  • Businesses and manufacturing have benefited from the evolution of digital information technology. The introduction of e-commerce has changed the way companies are conducted, and the manufacturing industry is using emerging technologies to automate and synchronize production processes in order to increase productivity and profitability. The results of the study show that incorporating the internet into e-commerce has transformed the process, making it one of the most advanced and high users of digital technology. E-commerce has advanced by leaps and bounds, allowing products and services to flow electronically with minimal delays. Manufacturing has benefited from the implementation of IoT, which has increased the productivity of production processes and is gradually becoming a major beneficiary of modern computer technology.

Securing C.I.A for Autonomous Vessels through the Application of VDI (VDI 적용을 통한 자율운항선박의 C.I.A 확보 방안 연구)

  • Choi, Youngryul;Baik, Namkyun
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.18 no.4
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    • pp.41-46
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    • 2022
  • In the fourth industrial era, when various technologies are fused and combined, new and advanced technologies from other industries are used extensively in the maritime industry field. New security threats are also increasing along with the development of new technologies. In addition, in incorporating convergence technologies into the maritime industry, various problems, such as communication definitions and procedures between technologies and customer-customized delays, occur. In this paper, for the problems mentioned above, research results on the network configuration of safer autonomous vessels by supplementing and fusing existing solutions rather than developing new technologies are proposed. In conclusion, the entire network consists of VDI and presents additional configurations to ensure confidentiality, integrity, and availability, which are the three security elements. According to the composition of such a convergence network, it is intended to help prepare countermeasures to protect internal data from external threats.

Linearity improvement of UltraScale+ FPGA-based time-to-digital converter

  • Jaewon Kim;Jin Ho Jung;Yong Choi;Jiwoong Jung;Sangwon Lee
    • Nuclear Engineering and Technology
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    • v.55 no.2
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    • pp.484-492
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    • 2023
  • Time-to-digital converters (TDCs) based on the tapped delay line (TDL) architecture have been widely used in various applications requiring a precise time measurement. However, the poor uniformity of the propagation delays in the TDL implemented on FPGA leads to bubble error and large nonlinearity of the TDC. The purpose of this study was to develop an advanced TDC architecture capable of minimizing the bubble errors and improving the linearity. To remove the bubble errors, the decimated delay line (DDL) architecture was implemented on the UltraScale + FPGA; meanwhile, to improve the linearity of the TDC, a histogram uniformization (HU) and multi-chain TDL (MCT) methods were developed and implemented on the FPGA. The integral nonlinearities (INLs) and differential nonlinearities (DNLs) of the plain TDCs with the 'HU method' (HU TDC) and with 'both HU and MCT methods' (HU-MCT TDC) were measured and compared to those of the TDC with 'DDL alone' (plain TDC). The linearity of HU-MCT TDC were superior to those of the plain TDC and HU TDC. The experiment results indicated that HU-MCT TDC developed in this study was useful for improving the linearity of the TDC, which allowed for high timing resolution to be achieved.

An Exploratory Study on Contactless Digital Economy: the Characteristics, Regulatory Issues and Resolutions (비대면 디지털 경제에 대한 탐색적 연구: 특성, 규제쟁점 및 개선방안을 중심으로)

  • Shim, Woohyun;Won, Soh-Yeon;Lee, Jonghan
    • Informatization Policy
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    • v.29 no.2
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    • pp.66-90
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    • 2022
  • The radical digital transformation and development of the contactless digital economy in the wake of the COVID-19 pandemic are increasing the need to solve various problems such as conflicts of interest among market participants and delays in related laws and regulations. This study investigates the concept and characteristics of the contactless digital economy and identifies the related regulatory issues and resolutions through literature review, news article analysis, and expert interviews. From the literature review, it is identified that the contactless digital economy has eight hyper-innovation characteristics: hyper-intelligence, hyper-connectivity, hyper-convergence, hyper-personalization, hyper-automation, hyper-precision, hyper-diversity, and hyper-trust. From news article analyses and expert interviews, this study identifies various regulatory issues, such as competition between incumbents and new entrants, the collision of constitutional rights, collision of social values, conflict between market participants, absence of laws and regulations, and existence of excessive market power, and then proposes a series of resolutions.

Support the IEEE 1588 Standard in A Heterogeneous Distributed Network Environment PTP for Time Synchronization Algorithms Based Application Framework Development Method (IEEE 1588 표준을 지원하는 이기종 분산 네트워크 환경에서 시간 동기화를 위한 PTP 알고리즘 기반의 어플리케이션 프레임워크 개발 기법)

  • Cho, Kyeong Rae
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.9 no.3
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    • pp.67-78
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    • 2013
  • In this paper, We proposed an development method of application framework for using the precision time protocol(PTP) based on physical layer devices to synchronize clocks across a network with IEEE1588 capable devices. The algorithm was not designed as a complete solution across all conditions, but is intended to show the feasibility of such a for the PTP(Precision Time Protocol) based on time synchronization of heterogeneous network between devices that support in IEEE 1588 Standard application framework. With synchronization messages per second, the system was able to accurately synchronize across a single heavily loaded switch. we describes a method of synchronization that provides much more accurate synchronization in systems with larger networks. In this paper, using the IEEE 1588 PTP support for object-oriented modeling techniques through the 'application framework development Development(AFDM)' is proposed. The method described attempts to detect minimum delays, or precision packet probe and packet metrics. The method also takes advantage of the Tablet PC(Primary to Secondary) clock control mechanism to separately control clock rate and time corrections, minimizing overshoot or wild swings in the accuracy of the clock. We verifying the performance of PTP Systems through experiments that proposed method.

Robust Internal Model Control of Three-Phase Active Power Filter for Stable Operation in Electric Power Equipment (전력설비의 안정한 운용을 위한 3상 능동전력필터의 강인한 내부모델제어)

  • Park, Ji-Ho;Kim, Dong-Wan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.10
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    • pp.1487-1493
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    • 2013
  • A new simple control method for active power filter, which can realize the complete compensation of harmonics is proposed. In the proposed scheme, a model-based digital current control strategy is presented. The proposed control system is designed and implemented in a form referred to as internal model control structure. This method provides a convenient way for parameterizing the controller in term of the nominal system model, including time-delays. As a result, the resulting controller parameters are directly set based on the power circuit parameters, which make tuning of the controllers straightforward task. In the proposed control algorithm, overshoots and oscillations due to the computation time delay is prevented by explicit incorporating of the delay in the controller transfer function. In addition, a new compensating current reference generator employing resonance model implemented by a DSP(Digital Signal Processor) is introduced. Resonance model has an infinite gain at resonant frequency, and it exhibits a band-pass filter. Consequently, the difference between the instantaneous load current and the output of this model is the current reference signal for the harmonic compensation.

Design and Implementation of Piping Spool Management Android Application using QR Code (QR Code를 활용한 배관 스풀관리용 안드로이드 어플리케이션 설계 및 구현)

  • Jeon, Sang-Moon;Kim, Kyoung-Su
    • Journal of Digital Contents Society
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    • v.13 no.4
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    • pp.609-616
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    • 2012
  • Plumbing of the plant project is an important discipline. Now workers on the construction site, carry hundreds of piping spool drawings and documents, record the Spool Stage data. Then, The data is input into the system or has been documented in the field office. Because of the work-flow, duplication work occurs. As a result, it is reducing the effectiveness of the Plumbing and causes schedule delays. Also, To manage the integration process, there is a problem, it takes a lot of time. Therefore, The study is conducted to design and implementation of piping spool management Android Application using QR Code. The Application will contribute to the management to the integration of piping work process.

Current Control of a 3$\phi$ PWM Converter Based on a New Control Model with a Delay and SVPWM effects (시지연과 SVPWM 영향이 고려된 새로운 제어 모델에 의한 3상 전압원 PWM 컨버터의 전류 제어)

  • Min, Dong-Ki;Ahn, Sung-Chan;Hyun, Dong-Seok
    • Proceedings of the KIEE Conference
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    • 1998.07f
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    • pp.2018-2020
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    • 1998
  • In design of a digital current controller for a 3$\phi$ voltage-source (VS) PWM converter, its conventional model, i.e., stationary or synchronous reference frame model, is used in obtaining its discretized version. It introduces, however, inherent errors since the following practical problems are not taken into consideration: the characteristics of the space vector-based pulsewidth modulation (SVPWM) and the time delays in the process of sampling and computation. In this paper, the new hybrid reference frame model of the 3$\phi$ VS PWM converter is proposed considering these problems. In addition, the direct digital current controller based on this model is designed without any prediction or extrapolation algorithm to compensate the time delay. So the control algorithm is made very simple. The validity of the proposed algorithm is proved by the computer simulation results.

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A Study on Measurement of Repetitive Work using Digital Image Processing (영상처리를 이용한 반복적 작업의 측정에 관한 연구)

  • Lee, Jeong-Cheol;Sim, Eok-Su;Kim, Nam-Joo;Park, Chan-Kwon;Park, Jin-Woo
    • IE interfaces
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    • v.14 no.1
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    • pp.95-105
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    • 2001
  • Previous work measurement methods need much time and effort of time study analysts because they have to measure required time through direct observations. In this study, we propose a method which efficiently measures standard times without involvement of human analysts using digital image processing techniques. This method consists of two main steps: motion representation step and cycle segmentation step. In motion representation step, we first detect the motion of any object distinct from its background by differencing two consecutive images separated by a constant time interval. The images thus obtained then pass through an edge detector filter. Finally, the mean values of coordinates of significant pixels of the edge image are obtained. Through these processes, the motions of the observed worker are represented by two time series data of worker location in horizontal and vertical axes. In the second step, called the cycle segmentation step, we extract the frames which have maximum or minimum coordinates in one cycle and store them in a stack, and calculate each cycle time using these frames. In this step we also consider methods on how to detect work delays due to unexpected events such as operator's escapement from the work area, or interruptions. To condude, the experimental results show that the proposed method is very cost-effective and useful for measuring time standards for various work environment.

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Design of Interleaver using the MAP Algorithm Scheme in the Multi-User CDMA Communication System (다중 사용자 CDMA 통신 시스템에서 MAP 알고리즘 기법을 사용한 인터리버 설계)

  • Kim, Dong-Ok;Oh, Chung-Gyun
    • 한국정보통신설비학회:학술대회논문집
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    • 2005.08a
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    • pp.417-421
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    • 2005
  • In the recent digital communication systems, the performance of Turbo Code using the error correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the turbo decoder. However, performance depends on the interleaver depth that needs many delays over the reception process. Moreover, turbo code has been known as the robust coding methods with the confidence over the fading channel. International Telecommunication Union(ITU) has recently adopted it as the standardization of the channel coding over the third generation mobile communications(IMT-2000). Therefore, in this paper, we proposed the interleaver that has the better performance than existing block interleaver, and modified turbo decoder that has the parallel concatenated structure using MAP algorithm. In the real-time voice and video service over third generation mobile communications, the performance of the proposed two methods was analyzed and compared with the existing methods by computer simulation in terms of reduced decoding delay using the variable decoding method over AWGN and fading channels for CDMA environments.

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