• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.03a
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• pp.18-20
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• 2010

The mechanism for suppression of Ag agglomeration in Ag-Mg alloy ohmic contact to p-GaN is investigated. The Ag-Mg alloy ohmic contact shows low contact resistivity of $6.3\;{\times}\;10^{-5}\;{\Omega}cm^2$, high reflectance of 85.5% at 460 nm wavelength after annealing at $400^{\circ}C$ and better thermal stability than Ag contact The formation of Ga vacancies increase the net hole concentration, lowering the contact resistivity. Moreover, the oxidation of Mg atoms in Ag film increase the work function of Ag-Mg alloy contact and prevents Ag oxidation. The inhibition of oxygen diffusion by Mg oxide suppresses the Ag agglomeration, leading to enhance light reflectance and thermal stability.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.22 no.2
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• pp.65-72
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• 2012

Aluminum induced crystallization of amorphous silicon was attempted by the aluminum substrate. To avoid the layer exchange between silicon and aluminum layer, Ni layer was deposited between these two layers by sputtering. To obtain the bigger grain of the crystalline silicon, wet blasted silica layer was employed as windows between the nickel and a-Si layer. Ni obtained after the annealing treatment at $520^{\circ}C$ was found to be a promising material for the diffusion barrier between silicon and aluminum. One way to obtain bigger grain of crystalline silicon layer applicable to solar cell of higher performance was envisioned in this investigation.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2008.10a
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• pp.203-206
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• 2008

Transformation of austenite to martensite during cold rolling has been widely used to strengthen metastable austenitic stainless steel grades. Aging treatment of cold worked metastable austenitic stainless steels, including ${\alpha}'$-martensite phase, results in the further increase of strength, when aging is performed in $200^{\circ}C$ to $450^{\circ}C$ temperature range. The purpose of the present study was to evaluate the effect of time and temperature on the stress-strain behavior of cold worked austenitic stainless steels. The amount of ${\alpha}'$-martensite during cold working and aging was examined by ferrite scope and X-ray diffraction (XRD). During aging at $450^{\circ}C$ for 1hr, tensile strength dramatically increased by 150MPa. Deformed metastable austenitic steels containing the "body-centered" ${\alpha}'$-martensite are strengthened by the diffusion of interstitial solute atoms during aging at low temperature.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.318-321
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• 2000

We showed that the change of Ar to $N_2$flow during the TiN deposition by the reactive sputtering decides the crystallinity of LPCVD W, as well as the electrical properties of the W-TiN/SiO$_2$Si capacitor. In particular, the threshold voltage can be controlled by the Ar to $N_2$ratio. As compared to the results obtained from the LPCVD W/SiO$_2$/Si MOS capacitor, the insertion of approximately 50 nm TiN film effectively prohibits the fluorine diffusion during the deposition and annealing of W films, resulting in negligible leakage currents at the low electric fields.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.245-251
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• 2017

Niobium doped zirconium oxide (Nb-Zr-O:NZO) thin films were fabricated on Si substrates by a sol-gel technique with an annealing temperatures of $500{\sim}1000^{\circ}C$ in air ($N_2:O_2=3:1$) for 20 minutes. It was found that the NZO film is based on tetragonal $ZrO_2$ polycrystalline structure with the Nb 5+ ion state and there is almost no diffusion of Nb or Zr to Si substrate. The relative dielectric constant for the NZO film with the Nb composition of 30 mol% and annealed at $800^{\circ}C$ was around 40. The root mean roughness was 1.02 nm. In addition, the leakage current of NZO films was as low as $10^{-6}A/cm^2$ at 4.4 V.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.186-186
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• 2015

We have introduced multifunctional ITO single thin films formed by normal sputtering system equipped with a plasma limiter which effectively blocks the bombardment of energetic negative oxygen ions. MFSS ITO also possesses high gas diffusion barrier properties simultaneously low resistivity even it deposited at room temperature without post annealing on plastic substrate. Nano-crystalline enhancement by Ar energy has energy window from 20 to 30 eV under blocking NOI condition. Effect of blocking NOI and optimal Ar energy window enhancement facilitate that resistivity is minimized to $3.61{\times}10^{-4}{\Omega}cm$ and the WVTR of 100 nm thick MFSS ITO is $3.9{\times}10^{-3}g/(m^2day)$ which is measured under environmental conditions of 90% relative humidity and 50oC that corresponds to a value of ${\sim}10^{-5}g/(m^2day)$ at room temperature. The multifunctional MFSS ITO with low resistivity, and low gas permeability will be highly valuable for plastic electronics applications.

• The Korean Journal of Ceramics
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• v.7 no.2
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• pp.70-73
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• 2001

Phase transformation of TiSi$_2$ confined in sub-micron area of which the size is around or smaller than the grain size of C49 TiSi$_2$ phase is studied. It has been known that the C49 to C54 phase change is massive transformation that occurs abruptly starting from C54 nuclei located at triple point grain boundaries of C49 phase. When the C49 phase is confined in sub-micron area, however, the massive phase transformation is observed to be hindered due to the lack of the triple point grain boundaries of C49 phase. Heat treatment at higher temperatures starts to decompose the C49 phase, and the resulting decomposed Ti atoms diffuse to, and react with, the underneath Si material to form C54 phase that exhibits spherical interface with silicon. The newly formed C54 grains can also trigger the massive phase transformation to convert the remaining undecomposed C49 grains to C54 grains by serving as nuclei like conventional C54 nuclei located at triple point grain boundaries.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.2
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• pp.55-62
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• 1992

Polycrystalline silicon ingots were manufactured using the casting method for polycrystalline silicon solar cells. These ingots were cut into wafers and ten n$^{+}$p type solar cells were made through the following simple process` surface etching, n$^{+}$p junction formation, metalization and annealing. For the grain boundary passivation, the samples were oxidized in O$_2$ for 5 min. at 80$0^{\circ}C$ prior to diffusion in Ar for 100 min. at 95$0^{\circ}C$. The conversion efficiency of polycrystalline silicon solar cells made from these wafers showed about 70-80% of those of the single crystalline silicon solar cell and superior conversion efficiency, compared to those of commercial polycrystalline wafers of Wacker Chemie. The maximum conversion efficiency of our wafers was indicated about 8%(without AR coating) in spite of such a simple fabrication method.

• Journal of Sensor Science and Technology
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• v.27 no.4
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• pp.264-268
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• 2018

Vertically-aligned $TiO_2$ nanotube electrodes have attracted considerable attention for applications in solar cells, catalysts, and sensors, because of their ideal structure for electron transport and electrolyte diffusion. Here, we prepare vertically-aligned $TiO_2$ nanotube electrodes using a two-step anodization process. The prepared $TiO_2$ nanotube electrodes exhibit uniform pore structures with an inner diameter of ~80-90 nm and wall thickness of ~20-25 nm. In addition, they exhibit an anatase crystal phase after a high-temperature annealing. The annealed $TiO_2$ nanotube electrodes are applied in dye-sensitized solar cells (DSSCs) as photoanodes. The fabricated DSSC exhibits conversion efficiencies of 3.46 and 2.15% with liquid- and gel-type electrolytes, respectively.

• Transactions on Electrical and Electronic Materials
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• v.6 no.1
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• pp.1-5
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• 2005

Continued scaling of MOS devices requires the formation of the ultra shallow and very heavily doped junction. The simulation and experiment results show that the degradation of pMOS performance in logic and SRAM pMOS devices due to the excessive diffusion of the tail and a large amount of dose loss in the extension region. This problem comes from the high-temperature long-time deposition process for forming the spacer and the presence of fluorine which diffuses quickly to the $Si/SiO_{2}$ interface with boron pairing. We have studied the method to improve the pMOS performance that includes the low-energy boron implantation, spike annealing and device structure design using TCAD simulation.