• Title/Summary/Keyword: differential gain

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The Gain Enhancement of 1.8V CMOS Self-bias High-speed Differential Amplifier by the Parallel Connection Method (병렬연결법에 의한 1.8V CMOS Self-bias 고속 차동증폭기의 이득 개선)

  • Bang, Jun-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.10
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    • pp.1888-1892
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    • 2008
  • In this paper, a new parallel CMOS self-bias differential amplifier is designed to use in high-speed analog signal processing circuits. The designed parallel CMOS self-bias differential amplifier is developed by using internal biasing circuits and the complement gain stages which are parallel connected. And also, the parallel architecture of the designed parallel CMOS self-bias differential amplifier can improve the gain and gain-bandwidth product of the typical CMOS self-bias differential amplifier. With 1.8V $0.8{\mu}m$ CMOS process parameter, the results of HSPICE show that the designed parallel CMOS self-bias differential amplifier has a dc gain and a gain-bandwidth product of 64 dB and 49 MHz respectively.

Design of High Gain Differential Amplifier Using GaAs MESFET's (갈륨비소 MESFET를 이용한 고이득 차동 증폭기 설계)

  • 최병하;김학선;김은로;이형재
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.8
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    • pp.867-880
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    • 1992
  • In this paper, a circuit design techniques for Improving the voltage gain of the GaAs MESFET single amplifier is presented. Also, various types of existing current mirror and proposed current mirror of new configuration are compared. To obtain the high differential mode gain and low common mode gain, bootstrap gain enhancement technique Is used and common mode feedback Is employed In the design of differential amplifier. The simulation results show that designed differential amplifier has differential gain of 57.66dB, unity gain frequency of 23.25GHz. Also, differential amplifier using common mode feedback with alternative negative current mirror has CMRR of 83.S8dB, stew rate of 3500 V /\ulcorners.

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New Fully-Differential CMOS Second-Generation Current Conveyer

  • Mahmoud, Soliman A.
    • ETRI Journal
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    • v.28 no.4
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    • pp.495-501
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    • 2006
  • This paper presents a new CMOS fully-differential second-generation current conveyor (FDCCII). The proposed FDCCII is based on a fully-differential difference transconductor as an input stage and two class AB output stages. Besides the proposed FDCCII circuit operating at a supply voltage of ${\pm}1.5\;V$, it has a total standby current of $380\;{\mu}A$. The applications of the FDCCII to realize a variable gain amplifier, fully-differential integrator, and fully-differential second-order bandpass filter are given. The proposed FDCII and its applications are simulated using CMOS $0.35\;{\mu}m$ technology.

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A High-Linearity Low-Noise Reconfiguration-Based Programmable Gain Amplifier

  • Han, Seok-Kyun;Nguyen, Huy-Hieu;Lee, Sang-Gug
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.4
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    • pp.318-330
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    • 2013
  • This paper presents a high-linearity low-noise small-size programmable gain amplifier (PGA) based on a new low-noise low-distortion differential amplifier and a proposed reconfiguration technique. The proposed differential amplifier combines an inverter-based differential pair with an adaptive biasing circuit to reduce noise and distortion. The reconfiguration technique saves the chip size by half by utilizing the same differential pair for the input transconductance and load-stage, interchangeably. Fabricated in $0.18-{\mu}m$ CMOS, the proposed PGA shows a dB-linear control range of 21dB in 16 steps from -11 dB to 10 dB with a gain error of less than ${\pm}0.33$ dB, an IIP3 of 7.4~14.5 dBm, a P1dB of -7~1.2 dBm, a noise figure of 13dB, and a 3-dB bandwidth of 270MHz at the maximum gain, respectively. The PGA occupies a chip area of $0.04mm^2$ and consumes only 1.3 mA from the 1.8 V supply.

Analysis on the Gain and the Differential Gain due to the Carrier Capture/Escape Process in a Quantum Well Laser (양자우물 레이저의 캐리어 포획 및 탈출에 따른 광 이득과 광 미분 이득 고찰)

  • 방성만;정재용;서정하
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.37 no.5
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    • pp.17-27
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    • 2000
  • In a SCH(separate confinement heterostructure) QW(quantum well) laser, we calculated the optical gain, the differential gain and recombination current in the QW and derived the bulk carrier density in the SCH region as a function of the QW current by using the analytical capture escape model. Based upon above relations, we found the optical gain and the differential gain correspond to the ratios of carrier and current injected into the QW.

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Design of High-Gain OP AMP Input Stage Using GaAs MESFETs (갈륨비소 MESFET를 이용한 고이득 연산 증폭기의 입력단 설계)

  • 김학선;김은노;이형재
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.1
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    • pp.68-79
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    • 1992
  • In the high speed analog system satellite communication system, video signal processing and optical fiber interface circuits, GaAs high gain operational amplifier is advantageous due to obtain a high gain because of its low transconductance and other drawbacks, such as low frequency dispersion and process variation. Therefore in this paper, a circuit techniques for improving the voltage gain for GaAs MESFET amplifier is presented. Also, various types of existing current mirror and current mirror proposed are compared.To obtain the high differential gain, bootstrap gain enhancement technique is used and common mode feedback is employed in differential amplifier.The simulation results show that gain is higher than that of basic amplifier about 18.6dB, and stability and frequency performance of differential amplifier are much improved.

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Equal Gain Differential Precoding Technique for Temporally Correlated Channels (시간 상관 채널에서 동 이득 차분 선부호화 기법)

  • Li, Xun;Kim, Sang-Gu;Kim, Young-Ju
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.49 no.1
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    • pp.11-18
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    • 2012
  • In this paper, we propose a novel equal-gain differential precoding scheme utilizing temporal correlation of channels. The conventional differential precoding schemes only quantize a part of channel space not the whole channel space, so that it virtually increases codebook size which enhances the system capacity. But the conventional differential schemes increase peak-to-average power ratio (PAPR) without preserving equal-gain transmission. This paper proposes the design method of equal-gain differential precoding scheme and analyzes the performances of the proposed equal-gain precoding scheme. Monte-Carlo simulations verify that the proposed scheme has an advantage of 1dB to obtain the same system capacity with the same amount of feedback information compared with the conventional LTE schemes, with showing very low PAPR property.

Integrated Rail-to-Rail Low-Voltage Low-Power Enhanced DC-Gain Fully Differential Operational Transconductance Amplifier

  • Ferri, Giuseppe;Stornelli, Vincenzo;Celeste, Angelo
    • ETRI Journal
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    • v.29 no.6
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    • pp.785-793
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    • 2007
  • In this paper, we present an integrated rail-to-rail fully differential operational transconductance amplifier (OTA) working at low-supply voltages (1.5 V) with reduced power consumption and showing high DC gain. An embedded adaptive biasing circuit makes it possible to obtain low stand-by power dissipation (lower than 0.17 mW in the rail-to-rail version), while the high DC gain (over 78 dB) is ensured by positive feedback. The circuit, fabricated in a standard CMOS integrated technology (AMS 0.35 ${\mu}m$), presents a 37 V/${\mu}s$ slew-rate for a capacitive load of 15 pF. Experimental results and high values of two quality factors, or figures of merit, show the validity of the proposed OTA, when compared with other OTA configurations.

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Performance Analysis of Rotation-lock Differential Precoding Scheme (회전로크 구조의 차분 선부호화 기법의 성능 분석)

  • Kim, Young Ju
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.4
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    • pp.9-16
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    • 2013
  • Long term evolution (LTE) and LTE-Advanced (LTE-A) systems adopt closed-loop multiple-input multiple-output antenna techniques. Equal gain transmission which has equal gain property is the key factor in their codebook design. In this paper, a novel differential codebook structure which maintains the codebook design requirements of LTE or LTE-A systems. Especially, eight-phase shift keying (8-PSK) constellations are used as elements of codewords, which not only maintain equal gain property but also reduce the computation complexity of precoding and decoding function blocks. The equal gain property is very important to uplink because the performance of uplink is very sensitive to the peak-to-average power ratio (PAPR). Moreover, the operation of the proposed differential codebook is explained as a rotation-lock structure. As the results of computer simulations, the steady-state throughput performance of the proposed codebook shows at least 0.9dB of SNR better than those of the conventional LTE codebook with the same amount of feedback information.

A Rail-to-Rail CMOS Op-amp with Constant Gain by Using Output Common Mode Current Compensation (출력 단 공통모드 전류 보상으로 일정한 이득을 갖는 Rail-to-Rail CMOS 연산증폭기)

  • Lee, Dong-Geon;Jeong, Hang-Geun
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.457-458
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    • 2008
  • This paper presents an output common mode current compensation method to achieve both constant Gm and constant gain. A conventional rail-to-rail CMOS op-amp with constant Gm was designed by using complementary differential input stage and current compensation skills. But it doesn't operate constant gain, because of output resistance variation. With $0.18{\mu}m$ CMOS process, the simulation results show that the differential gain variation can achieve less than 1.3dB. And a 60dB gain, a 13.5MHz unity gain-frequency, and 1mW power consumption, when operating at 1.8V and 10pF load.

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