• Transactions on Electrical and Electronic Materials
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• v.8 no.3
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• pp.110-114
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• 2007

Dependence of the thermal stability of nickel silicide on the film stress of inter layer dielectric (ILD) layer has been investigated in this study and silicon nitride $(Si_3N_4)$ layer is used as an ILD layer. Nickel silicide was formed with a one-step rapid thermal process at $500^{\circ}C$ for 30 sec. $2000{\AA}$ thick $Si_3N_4$ layer was deposited using plasma enhanced chemical vapor deposition after the formation of Ni silicide and its stress was split from compressive stress to tensile stress by controlling the power of power sources. Stress level of each stress type was also split for thorough analysis. It is found that the thermal stability of nickel silicide strongly depends on the stress type as well as the stress level induced by the $Si_3N_4$ layer. In the case of high compressive stress, silicide agglomeration and its phase transformation from the low-resistivity nickel mono-silicide to the high-resistivity nickel di-silicide are retarded, and hence the thermal stability is obviously improved a lot. However, in the case of high tensile stress, the thermal stability shows the worst case among the stressed cases.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.5
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• pp.329-337
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• 2001

It has been known that the leakage current in the low field region consists of the dielectric relaxation current and intrinsic leakage current, which cause the charge loss in dynamic random access memory (DRAM) storage capacitor using (Ba,Sr)TiO$_{3}$ (BST) thin film. Especially, the dielectric relaxation current should be seriously considered since its magnitude is much larger than that of the intrinsic leakage current in giga-bit DRAM operation voltage (~IY). In this study, thermally stimulated current (TSC) measurement was at first applied to investigate the activation energy of traps and relative evaluation of the density of traps according to process change. And, through comparing TSC to early methods of I-V or I-t measurement and analyzing, we identify the origin of the dielectric relaxation current and investigate the reliability of TSC measurement. First, the polarization condition such as electric field, time, temperature and heating rate was investigated for reliable TSC measurement. From the TSC measurement, the energy level of traps in the BST thin film has been investigated and evaluated to be 0.20($\pm$0.01) eV and 0.45($\pm$0.02) eV. Based on the TSC measurement results before and after rapid thermal annealing (RTA) process, oxygen vacancy is concluded to be the origin of the traps. TSC characteristics with thermal annealing in the MIM BST capacitor have shown the same trends with the current-voltage (I-V) and current-time (I-t) characteristics. This means that the TSC measurement is one of the effective methods to characterize the traps in the BST thin film.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1699-1705
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• 1989

Nitridation of about 300\ulcornerSiO2 filmss thermally grown on Si was performed in NH3 plasm ambient (0.2-2 torr) at 900\ulcornerC-1100\ulcorner for 15-20 minutes. The peoperties of those films have been investigated by analyzing the AES and the SIMS data, and the results of the I-V and the C-V measurements. At the plasma ambient of less than 1.5 torr pressure, etching of the films have been shown. Above the 1.5 torr pressure, however, SiO2 films were nitrided as SiIxNy. Plasma thermal nitridation of SiO2 by addition of small amount (6%) of CF4 to the NH3 showed higher pile-up N concentration in the surface region of SiOxNy film. The higher the nitridation temperature is and the longer the nitridation time is the larger the dielectric constant is. The plasma thermal nitridation of silicon dioxide on silicon causes the flat-band voltage shift based on the formation of the positive charge. The conduction mechanism for SiOxNy films could be elucidated by Fowler-Nordheim tnneling model. By SIMS analysis, surface of the film nitrided in plasma process has less contamination than that of the film nitrided in open-tube process.

• Electrical & Electronic Materials
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• v.7 no.1
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• pp.25-31
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• 1994

Properties of oxynitride films reoxidized by $N_2{O}$ gas after thermal oxidation and $N_2{O}$ oxide films directly oxidized by using $N_2{O}$ gas on the bare silicon wafer have been studied. From the AES analysis, nitrogen pile-up at the interface of Si/oxynitride and Si/$N_2{O}$ oxide has observed. $N_2{O}$ oxide and oxynitride films have the self-limited characteristics. Therefore, it will be possible to obtain ultra-thin films. Nitrogen pile-up at the interfaces of Si/oxynitride and Si/$N_2{O}$ oxide strengthens film structure and improves dielectric reliability. Although fixed charge densities and interface trap densities of N20 oxide and oxynitride films have somewhat higher than those of thermal $SiO_2{O}$, $N_2{O}$ oxide and oxynitride films showed improved I-V characteristics and constant current stress.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.11
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• pp.1179-1185
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• 1991

Ultrathin Reoxidized Nitrided Oxides were formed by lamp heated rapid thermal annealing in oxyzen at temperatures of $1050^{\circ}C$-$1100^{\circ}C$ for 20, 40 seconds. The electrical characteristics of ultrathin films were evaluated by leakage current breakdown voltage. TDDB. FN tunneling. Nitridation and reoxidition condition dependence of charge trapping properties. i.e.. the flat band voltage shift $({\Delta}V_{FB})$ and the increase of charge-to-breakdown $(Q_{BD})$ induced by a high field stress where studied. As the results of analysis. rapid thermal reoxidation was achieved striking improvement of dielectric integrity, the charge to breakdown was increased and flat band voltage shift was reduced.

• Journal of the Korean Ceramic Society
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• v.20 no.1
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• pp.25-30
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• 1983

This experiment was studied in the system of (1-x) CaO MgO $2SiO-Al_2O_3$ to investigate forming of solid solution. The technique empolyed was the well known water-quenching method. Differential thermal analysis of the each glass water quenched indicated that under 30 mole% $Al_2O_3$ was lowered with increasing of the amount of $Al_2O_3$ It was supposed by X-ray diffraction patterns of each specimen sintered at various temperature that only solid solution was formed under the 30mole % $Al_2O_3$ compositions solid solution and anorthite were formed at the 20mole% $Al_2O_3$ composition anorthite solid solution and spinel$(MgAl_2O_4)$ were formed over the 40mole% $Al_2O_3$ compositions. The maximum density and thermal expanison coefficient was 2.89g/cm 7.74x106./C$^{\circ}$ respectively in the composi-tion of 10 mole% $Al_2O_3$ . All the specimens showed linear thermal expansion behavior. Microhardness was as high as 850kg/nm2 in the composition of 5, 10, 20 mole % $Al_2O_3$ and dielectric constant was 7.3-6.9.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.16 no.4
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• pp.173-179
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• 2023

This paper analyzes the time-dependent dielectric breakdown(TDDB) degradation mechanism for each stress region of Peri devices manufactured by 4th generation VNAND process, and presents a complementary lifetime prediction model that improves speed and accuracy in a wider reliability evaluation region compared to the conventional model presented. SiON dielectric nMOSFETs were measured 10 times each under 5 constant voltage stress(CVS) conditions. The analysis of stress-induced leakage current(SILC) confirmed the significance of the field-based degradation mechanism in the low electric field region and the current-based degradation mechanism in the high field region. Time-to-failure(TF) was extracted from Weibull distribution to ascertain the lifetime prediction limitations of the conventional E-model and 1/E-model, and a parallel complementary model including both electric field and current based degradation mechanisms was proposed by extracting and combining the thermal bond breakage rate constant(k) of each model. Finally, when predicting the lifetime of the measured TDDB data, the proposed complementary model predicts lifetime faster and more accurately, even in the wider electric field region, compared to the conventional E-model and 1/E-model.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.41.2-41.2
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• 2011

Recently, scaling down of ULSI (Ultra Large Scale Integration) circuit of CMOS (Complementary Metal Oxide Semiconductor) based electronic devices become much faster speed and smaller size than ever before. However, very narrow interconnect line width causes some drawbacks. For example, deposition of conformal and thin barrier is not easy moreover metallization process needs deposition of diffusion barrier and glue layer. Therefore, there is not enough space for copper filling process. In order to overcome these negative effects, simple process of copper metallization is required. In this research, Cu-V thin alloy film was formed by using RF magnetron sputter deposition system. Cu-V alloy film was deposited on the plane $SiO_2$/Si bi-layer substrate with smooth and uniform surface. Cu-V film thickness was about 50 nm. Cu-V layer was deposited at RT, 100, 150, 200, and $250^{\circ}C$. XRD, AFM, Hall measurement system, and XPS were used to analyze Cu-V thin film. For the barrier formation, Cu-V film was annealed at 200, 300, 400, 500, and $600^{\circ}C$ (1 hour). As a result, V-based thin interlayer between Cu-V film and $SiO_2$ dielectric layer was formed by itself with annealing. Thin interlayer was confirmed by TEM (Transmission Electron Microscope) analysis. Barrier thermal stability was tested with I-V (for measuring leakage current) and XRD analysis after 300, 400, 500, 600, and $700^{\circ}C$ (12 hour) annealing. With this research, over $500^{\circ}C$ annealed barrier has large leakage current. However V-based diffusion barrier annealed at $400^{\circ}C$ has good thermal stability. Thus, thermal stability of vanadium-based thin interlayer as diffusion barrier is good for copper interconnection.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.12
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• pp.2258-2263
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• 2006

In this parer, hump characteristics of short-channel nMOSFETs induced by moistures of the ILD(inter-layer dielectric) layer in the shallow trench isolation (STI) process are investigated and the method for hump suppression is proposed Using nMOSFETs with various types of the gate and a measurement of TDS-APIMS (Thermal Desorption System-Atmospheric Pressure ionization Mass Spectrometry), hump characteristics were systematically analyzed and the systemic analysis based hump model was presented; the ILD layer over poly-Si gate of nMOSFET generates moistures, but they can't diffuse out of the SiN layer due to the upper SiN layer. Consequently, they diffuses into the edge between the gate and STI and induces short-channel hump. In order to eliminate moisture in the ILD layer by out-gassing method, the annealing process prior to the deposition of the SiN layer was carried out. As the result, short-channel humps of the nMOSFETs were successfully suppressed.

• Electrical & Electronic Materials
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• v.16 no.9
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• pp.65.1-65
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• 2003

The interface of zirconium oxide thin films on silicon is analyzed in detail for their potential applications in the microelectronics. The formation of an interfacial layer of ZrSi$\sub$x/O$\sub$y. with graded Zr concentration is observed by the x-ray photoelectron spectroscopy and secondary ion mass spectrometry analysis. The as-deposited ZrO$_2$/ZrSi$\sub$x/O$\sub$y//Si sample is thermally stable up to 880$^{\circ}C$, but is less stable compared to the ZrO$_2$/SiO$_2$/Si samples. Post-deposition annealing in oxygen or ammonia improved the thermal stability of as-deposited ZrO$_2$/ZrSi$\sub$x/O$\sub$y/Si to 925$^{\circ}C$, likely due to the oxidation/nitridation of the interface. The as-deposited film had an equivalent oxide thickness of∼13 nm with a dielectric constant of ∼21 and a leakage current of 3.2${\times}$10e-3 A/$\textrm{cm}^2$ at 1.5V. Upon oxygen or ammonia annealing, the formation of SiO$\sub$x/ and SiH$\sub$x/N$\sub$y/O$\sub$z/ at the interface reduced the overall dielectric constants.