• Proceedings of the KIEE Conference
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• 2005.11a
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• pp.36-38
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• 2005

This study is about how to lower the driving voltage that enables to move the micro droplet by the EWOD (Electro Wetting On Dielectric) mechanism. EWOD is well known that it is used ${\mu}-TAS$ digital micro fluidics system. As the device which is fabricated with dielectric layer between electrode and micro droplet is applied voltage, the hydrophobic surface is changed into the hydrophilic surface by electrical property. Therefore, EWOD induces the movement of micro droplet with reducing contact angle of micro droplet. The driving voltage was depended on the dielectric constant of dielectric layer, thus it can be reduced by increase of dielectric constant. Typically, very high voltage ($100V{\sim}$) is used to move the micro droplet. In previous study, we used $Ta_{2}O_{5}$ as the dielectric layer and driving voltage was 23V that reduced 24 percent compared with $SiO_2$. In this study, we used $BZN(Bi_{2}O_{3}ZnO-Nb_{2}O_{5})$ layer which had high dielectric constant. It was operated the just 12V. And micro droplet was moved within Is on 15V. It was reduced the voltage until 35 percents compare with $Ta_{2}O_{5}$ and 50 percents compare with $SiO_2$. The movement of micro droplet within 1s was achieved with BZN (ferroelectrics)just on 15V.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.9
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• pp.46-55
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• 1992

This paper propose how to calculate the capacitance for VLSI interconnection lines in multi-dielectric layer. The proposed method is a expansive form of 3-dimensional direct intergral method developed in single-dielectric layer. We took into consideration the effect of multi-dielectric layer by using additional boundary condition instead of modified Green's function. It is used the potential equations in line surface and the electric field equations in dielectric interface as the boundary condition. RC delay time for interconnection line of multi-dielectric layer is obtained from the calculated capacitance value. At this time, we are used Al and WSiS12T as interconnection materials.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.8
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• pp.755-759
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• 2008

For the development of a new white dielectric layer in plasma display panel, different $TiO_2$ types as a filler was add to the $Bi_2O_3$-BaO-ZnO glass matrix. The reflectance and dielectric constant of dielectric have been investigated as a function of the mixing content (rutile and anatase), and sintering temperature. The reflectance of dielectric sintered at the 520$^{\circ}C$ appeared most highly and suitable in terms of the adhesion and reflectance of the soda-lime glasses. Also, the thermal expansion coefficient of dielectric was found to be $85.6\times10^{-7}/K$, which was similar to that of the soda-lime glasses. Especially, the dielectric constants were not increased with increasing of $TiO_2$ filler contents.

• Proceedings of the KIEE Conference
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• 1998.07e
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• pp.1788-1790
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• 1998

The dielectric layers in AC plasma display panel(AC PDP) are essential to the discharge cell structure, because they protect metal electrodes from sputtering by positive ion bombarding in discharge plasma and form a sheath of wall charges which are essential to memory function of AC PDP. This layer should have high dielectric strength and also be transparent because the luminance of PDP is strongly correlated this layer. In this paper, we discussed the dielectric strength and transparency of the dielectric layer under various conditions. As a result, on the $15{\mu}m$ thickness, the minimum dielectric strength was $29V/{\mu}m$ and the transmittance coefficient was about 80% after $570^{\circ}C$ firing process. It can be proposed that the resonable dielectric thickness in AC PDP is $15{\mu}m$ because it has about 80V margin on the maximum applied voltage.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.768-771
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• 2004

Pb0.5,Sr0.5TiO3(PST) thin films were deposited on Si with MgO (100) buffer layer by the alkoxide-based sol-gel method. Structural and dielectric properties of PST thin films for the tunable microwave device applications were investigated. For the MgO/Si buffer layer, the PST thin films exhibited highly (100) orientation. The MgO buffer layer affects the stress state of the (100)-oriented PST thin films. The dielectric constant, tunability, and FOM of the highly (100)-oriented PST thin film increased with increasing annealing temperature due to the decrease in lattice distortion. The differences in dielectric properties may be attributed to the change in the film stress. The dielectric constants, dielectric loss and tunability of the PST thin films deposited on the MgO/Si substrates measured at 10 kHz were 822, 0.025, and 80.1%, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.12
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• pp.131-137
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• 2004

In this paper, we proposed the method of the characteristic impedance and effective dielectric constant calculations of a parallel-two-wire transmission line coated with multi-layer dielectric material using conformal mapping method. First of all, we calculated the capacitance of the transmission line when coated by N layer dielectric material which has different thickness and dielectric constant and calculated the characteristic impedance and effective dielectric constant using calculated capacitances. When compared with the Maxwell 2D (made by Ansoft Corporation) simulation result calculated result was very similar to the simulation result within the four percent error range.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.312.2-312.2
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• 2016

본 연구에서는 $HfO_2$와 $ZrO_2$의 구조적 차이를 통한 Dielectric layer의 특성 변화에 대한 분석을 진행하였다. $HfO_2$와 $ZrO_2$ layer는 용액 공정을 통해 만들고, 용액의 농도는 0.2 M로 제작하여 Spin Coating으로 소자를 제작하였다. 각 소자들의 구조적인 차이를 위해 $HfO_2$/$HfO_2$, $ZrO_2$/$HfO_2$, $HfO_2$/$ZrO_2$, $ZrO_2$/$ZrO_2$ 층 순서로 제작되었다. 각 소자들의 Capacitance 값은 245.72, 259.81, 294.23, $312.12nF/cm^2$으로 측정 되었고, Leakage current 값은 1.01, 1.79, 0.09, $0.0910-1A/cm^2$으로 다소 높은 값으로 확인되었다. 또한 dielectric constant, k 값이 16.6, 17.6, 19.9, 21.2로 각각의 측정값들 모두 substrate쪽의 dielectric layer에 따라 비슷한 특성을 갖게 되는 것을 확인했다. 이를 통해 Electrode 쪽의 layer보다 Substrate 쪽의 layer의 영향이 더 큰 것을 알 수 있다.

• Journal of Information Display
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• v.11 no.2
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• pp.84-90
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• 2010

This paper presents the effects of a dielectric layer and an electrolyte on the driving performance of an electrowetting on dielectric (EWOD)-based liquid lens. The range of tunable focal length of the EWOD-based liquid lens was highly dependent on the conditions of the dielectric layer, which included an inorganic oxide layer and an organic hydrophobic layer. Moreover, experiments on the physical and optical durability of electrolyte by varying temperature conditions, were conducted and their results were discussed. Finally, the lens with a truncated-pyramid silicon cavity having a sidewall dielectrics and electrode was fabricated by anisotropic etching and other micro-electromechanical systems (MEMS) technologies in order to demonstrate its performance. The lens with $0.6-{\mu}m$-thick $SiO_2$ layer and 10 wt% LiCl-electrolyte exhibited brilliant focal-length tunability from infinity to 3.19 mm.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.1
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• pp.83-88
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• 2020

In this paper, H-polarized electromagnetic scattering problems by a conductive strip grating between a grounded double dielectric layer are analyzed by applying the FGMM(Fourier-Galerkin Moment Method) known as a numerical method of electromagnetic fileld. The boundary conditions are applied to obtain the unknown field coefficients, and the conductive boundary condition is applied to analysis of the conductive strip. The numerical results for normalized reflected power are analyzed by according as the width and spacing of conductive strip, the relative permittivity and thickness of the grounded double dielectric layers, and incident angles. Generally, as the value of the dielectric constant and dielectric thickness of a grounded double dielectric layer increases, the reflected power increased. And as dielectric thickness of a grounded double dielectric layer increases, the current density induced in the strip center increases. The numerical results for the presented structure of this paper are shown in good agreement compared to those of the existing papers using the PMM(Point Matching Method).

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.17 no.3
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• pp.102-107
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• 2007

Dielectric layer of phosphate glass for plasma display panel (PDP) device made by silk screen printing on soda-lime glass. For regulate thermal expansion coefficient (CTE) of between substrate glass and dielectric layer use addition of $Al_2O_3$ and $TiO_2$. The crystallization process of glass-ceramics for dielectric layer have been examined by DTA, XRD some of optical, electrical properties of the dielectric layer were evaluated by UV-spectrometer, dilatometer, impedance analyser. The principal crystalline phase was identified as zinc metaphosphate [$Zn(PO_3)_2$] and zinc pyrophosphate [$Zn_2P_2O_7$]. Reflectance and dielectric constance increased with the addition of $TiO_2$ filler, dielectric constant lower the out side reflectance unchanging of the adding of $Al_2O_3$ filler. Besides CTE was at about $62{\times}10^{-7}/^{\circ}C$.