• Title/Summary/Keyword: dielectric layer

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The dark-current and X -ray sensitivity measurement of hybrid digital X-ray detector having dielectric layer structure (a-Se 기반의 혼합형 X-선 검출기에서 유전층의 누설전류 저감효과)

  • Seok, Dae-Woo;Park, Ji-Koon;Joh, Jin-Wook;Lee, Dong-Gil;Moon, Chi-Woong;Nam, Sang-Hee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.05b
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    • pp.31-34
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    • 2002
  • In this paper, the electric properties of amophous selenium multilayer samples has been investigated. In order to develop the hybrid flat-panel digital· X-ray image detector, we measured and analyzed their performance parameters such as the X -ray sensitivity and dark-current for a amophous selenium multilayers X-ray detector with a phosphor layer, The hybrid digital X-ray image detector can be constructed by integrating a phosphor layer (or a scintillative layer) that convert X-ray to a light on a-Se photoconduction mulilayers that convert a light to electrical signal. As results, the dielectric materials such as parylene between the phosphor layer and the top electrode may reduce the dark-current of the samples. Amorphous selenium multilayers having dielectric layer(parylene) has characteristics of low dark-current, high X-ray sensitivity. So we can acquired a enhanced signal to noise ratio. In this paper offer the method can reduce the dark-current in the hybrid X-ray detector.

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Molecular Aligning Properties of a Dielectric Layer of Polymer-Ceramic Nanocomposite for Organic Thin-Film Transistors

  • Kim, Chi-Hwan;Kim, Sung-Jin;Yu, Chang-Jae;Lee, Sin-Doo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.1200-1203
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    • 2004
  • We investigated the molecular aligning capability of a polymer layer containing ceramic nanoparticles which can be used as a gate insulator of organic thin-film transistors (OTFTs). Because of the enhanced dielectric properties arising from the nanoparticles and molecular aligning properties of the polymer, the composite layer provides excellent mobility characteristics of the OTFTs.

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Developments of Transparent ac-PDPs

  • Choi, Hak-Nyun;Lee, Seog-Young;Kim, Yong-Seog
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1621-1624
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    • 2008
  • Transparent ac-PDP test panel was prepared via a combination of materials including ITO sustaining electrodes, thin film dielectric layer and nano-sized phosphor powders. The thin film dielectric layer was prepared by E-beam evaporation process and phosphor layer was deposited on metal mesh pattern by electrophoretic deposition process. The optical transmittance and luminance of the panel indicated that full color transparent ac-PDP is feasible with the approach.

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A Study on the Discharge Characteristics and Formation of MgO Protection Layer for PDP by Reactive Sputtering (반응성 스파트링에 의한 PDP용 MgO 보호층 형성과 그 방전특성에 관한 연구)

  • 하홍주;이우근;남상옥;박영찬;조정수;박정후
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1996.11a
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    • pp.357-360
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    • 1996
  • MgO protection layer in ac PDP(plasma display panel) prevents the dielectric layer from ion bombarding in discharge plasma. The MgO layer also has the additional important role in lowering the firing voltage due to a large secondary electron emission coefficient. Until now, the MgO protection layer is mainly prepared by E-beam evaporation. In this study, MgO protection layer is prepared on dielectric layer of ac PDP cell by reactive R.F magnetron sputtering with Mg target under various conditions of oxygen partial pressure. Discharge characteristics of PDP is also studied as a parameter of MgO preparation conditions. The sputtered MgO shows the better discharge characteristics compared with MgO deposited by E-beam evaporator.

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Solution of TM Scattering Applying FGMM and PMM for Conductive Strip Grating Between a Grounded Double Dielectric Layers (접지된 2중 유전체층 사이의 도체띠 격자에 대해FGMM과 PMM을 적용한 TM 산란 해)

  • Uei-Joong Yoon
    • The Journal of the Convergence on Culture Technology
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    • v.9 no.3
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    • pp.721-726
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    • 2023
  • In this paper, TM electromagnetic scattering problems for conductive strip grating between grounded double dielectric layers are analyzed by applying the FGMM(fourier galerkin moment method) and PMM(point matching method) known as a numerical method of electromagnetic field. The boundary conditions are applied to obtain the unknown field coefficients. In order to deal with the problem of grounded double dielectric layers, numerical calculation was performed only when the thickness and relative permittivity of the dielectric layers had the same value. As the thickness of the dielectric layer and the relative permittivity increased, the overall reflected power increased, and the minimum values of the reflected power shifted in the direction of increasing the strip width. The numerical results obtained by applying the numerical methods of FGMM and PMM to the structure proposed in this paper agree very well.

Dependence of Xe Plasma Flat Fluorescent Lamp On the Electrode Gap and Dielectric Layer Thickness

  • Kang, Jong-Hyun;Lee, Yang-Kyu;Heo, Sung-Taek;Oh, Myung-Hoon;Lee, Dong-Gu
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1519-1521
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    • 2007
  • In this work, a coplanar-type plasma flat fluorescent lamp having cross type of electrode was fabricated by screen printing and sealing technique. Cross type of electrode with a dielectric layer were screen-printed on a rear glass plate, and then fired at $550^{\circ}C$. Phosphor was printed on and fired at $450^{\circ}C$. Finally, the lamp was sealed by frit glass at $450^{\circ}C$. The lamp of cross electrode type was studied depending on the electrode gap and the thickness of dielectric layer.

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Bias stress effect in organic thin-film transistors with cross-linked PVA gate dielectric and its reduction method using $SiO_2$ blocking layer

  • Park, Dong-Wook;Lee, Cheon-An;Jung, Keum-Dong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.445-448
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    • 2006
  • Bias stress effect in pentacene organic thin-flim transistors with cross-linked PVA gate dielectric is analyzed. For negative gate bias stress, positive threshold voltage shift is observed. The injected charges from the gate electrode to the defect states of gate dielectric are regarded as the main origin of $V_T$ shift. The reduced bias stress effect using $SiO_2$ blocking layer confirms the assumed mechanism. It is also demonstrated that the inverter with $SiO_2$ blocking layer shows the negligible hysteresis owing to the reduced bias stress effect.

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The thermal analysis of te-based media for the optical recording (광기록에 이용되는 Te-based media에 대한 열적 해석)

  • 이성준;천석표;이현용;정홍배
    • Electrical & Electronic Materials
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    • v.8 no.1
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    • pp.64-70
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    • 1995
  • We discussed the thermal analysis for a recording media with the variation of the laser pulse duration, the laser power and the temperature distribution in order to optimize the Te-based antireflection structure from the computer calculations. In the case that the radial heat diffusion is negligible, we can calculate the maximum temperature of the recording layer at the center of the spot by the Simple Model. The temperature profile of the recording layer is obtained from the Numerical Model by considering the total specific heat and the latent heat. As a result, the effect of the heat sinking acting as a thermal loss for the hole formation could be minimized by introducing the pulse with the hole formation duration(.tau.) below the thermal time constant(.tau.$_{D}$) of a dielectric layer. These requirments can be satisfied by using the dielectric thickness of the 2nd ART(Anti-Reflection Trilayer) condition or the dielectric materials with a low thermal diffusivity.y.

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Analysis the Reliability of Multilayer Ceramic Capacitor with inner Ni Electrode under highly Accelerated Life Test Conditions

  • Yoon, Jung-Rag;Lee, Kyung-Min;Lee, Serk-Won
    • Transactions on Electrical and Electronic Materials
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    • v.10 no.1
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    • pp.5-8
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    • 2009
  • The reliability of multilayer ceramic capacitor with active thin dielectric layer was investigated by highly accelerated life test at various stress condition. The distribution of multilayer ceramic capacitor failure times is plotted as a function of time from Weibull distribution function. According to the test result, voltage acceleration factor is obtained from 2.24 to 2.96. The acceleration by temperature is much higher than other values of active thick dielectric layer. It is clear that median time to failure is affected by the stress voltage for high volumetric efficiency ceramic capacitors with active thin dielectric layer. The degradation under stress of voltage involves electromigration and accumulation of oxygen vacancy at Ni electrode interface of cathode.

Measurements of multimode characteristics including surface wave mode in a dielectrically loaded rectangular cavity (직육면체 캐비티의 다중 모드 특성및 표면파 모드 특성 측정)

  • 김채영;김윤명;라정웅
    • 전기의세계
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    • v.28 no.4
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    • pp.47-52
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    • 1979
  • Total number of resonant modes in a microwave oven cavity may be maximized for a given frequency bandwidth to obtain more uniform power distribution by choosing proper size of the cavity. The total number of modes is calculated for a dielectrically loaded rectangular cavity and its size is suggested here for which the change in the number of modes is less sensitive to the change of dielectric layer thickness and its total number of modes is maximized in a given range of cavity sizes. A prove coupled rectangular cavity is constructed and the total existing modes are measured to see the change of modes depending on the dielectric layer thickness and the cavity size. Surface wave mode existing in the dielectric layer is confirmed by measuring Q and the input impedance of the cavity for this mode, which closely compares with the calculation.

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