• The Korean Journal of Ceramics
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• v.3 no.1
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• pp.5-12
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• 1997

Charged carbon clusters which are formed by the gas activation are suggested to be responsible for the formation of the metastable diamond film. The number of carbon atoms in the cluster that can reverse the stability between diamond and graphite by the capillary effect increases sensitively with increasing the surface energy ratio of graphite to diamond. The gas activation process produces charges such as electrons and ions, which are energetically the strong heterogeneous nucleation sites for the supersaturated carbon vapor, leading to the formation of the charged clusters. Once the carbon clusters are charged, the surface energy of diamond can be reduced by the electrical double layer while that of graphite cannot because diamond is dielectric and graphite is conducting. The unusual phenomena observed in the chemical vapor deposition diamond process can be successfully approached by the charged cluster model. These phenomena include the diamond deposition with the simultaneous graphite etching, which is known as the thermodynamic paradox and the preferential formation of diamond on the convex edge, which is against the well-established concept of the heterogeneous nucleation.

• Journal of the Korean Ceramic Society
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• v.35 no.1
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• pp.88-96
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• 1998

The structural and electrical properties of titanium dioxide(TiO2) thin films deposited on p-type (100) si and 4$^{\circ}$off(100) Si substartes by metalorganic chemical vapor deposition (MOCVD) have been studied with post rapid thermal annealing. TiO2 thin films of anatase phase were grown at 300-500$^{\circ}C$ using titanium post rapid thermal annealing at a temperature of 800$^{\circ}C$ for 30sec. rutile phase was observed in the condition of the deposition temperature over 350$^{\circ}C$ in the ambient air atmosphere and at 500$^{\circ}C$ in cacuu,. SEM and AFM study show-ed surface roughness were increased slightly from 40${\AA}$to 55${\AA}$ after annealing due to grain growth and phase transformation. From capacitane-voltage measurement of Al/TiO2./p-Si structure after annealing we obtained ideal capacitance-voltage characteristics of MOS structure with dielectric constant of 16-22 in case of (100) Si and about 30- in case of 4$^{\circ}$off(100) Si but showed the higher leakage current.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.1
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• pp.29-34
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• 2009

PLZT thin films were deposited on platinized silicon (Pt/$TiSiO_2$/Si) substrate by RF magnetron sputtering. A $TiO_2$ buffer layer was fabricated, prior to deposition of PLZT films. the layer was strongly affected the crystallographic orientation of the PLZT films. X-ray diffraction was performed on the films to study the crystallization of the films as various substrate temperatures (Ts). According to increasing Ts, preferred orientation of films was changed (110) plane to (111) plane. The ferroelectric, dielectric and electrical properties of the films were also investigated in detail as increased substrate temperatures. The PLZT films deposited at $400^{\circ}C$ showed good ferroelectric properties with the remnant polarization of $15.8{\mu}C/cm^2$ and leakage current of $5.4{\times}10^{-9}\;A/cm^2$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.43-44
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• 2008

PECVD 방식에 의거 low-k 유전상수를 갖는 층간 절연막 (ILD)를 제작하였다. 전구체 BTMSM 액체를 기화하여 16sccm 에서부터 1 sccm씩 증가하면서 25sccm 까지 p-Si[100] 기판위에 유량비를 조절하였으며 60 sccm으로 일정산소 $O_2$ 가스를 반응 챔버에 도달하도록 하였다. 제작된 시편의 구성성분은 FTIR의 흡수선으로 확인하였고, 알루미늄 전극을 구현한 MIS (Al/SiOCH/p-si(100)) 구조의 커패시터를 가지고 정전용량-전압 (C-V) 특성을 측정하여 유전상수를 계산하였다. BTMSM/$O_2$에 의한 층간절연막의 k ~ 2 근방의 저유전상수는 유량비에 민감하게 의존되고 열처리에 의하여 $CH_3$의 소멸 및 Si-O-Si(C) 성장하는 효과에 의하여 더 낮아짐을 확인할 수 있었다. 또한 상온 및 대기압에서 공기 중에 노출시켜 자연 산화과정을 겪은 시편들의 유전상수는 전체적으로 증가하였지만, 열처리한 박막이 상대적으로 안정화된 것을 확인하였다.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2501-2503
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• 1998

In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PTO layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PTO layer of c-axial orientation raised thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PTO layer were measured, too.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.119-120
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• 2008

ILD CMP process has been well accepted for the planarization of the dielectric oxide film and becomes a critical process in ULSI manufacturing due to the rapid shrinkage of the design rule for the device. In total manufacturing process steps for a device, the proportion of ILD CMP process has been gradually increased. Ever since ILD CMP has been introduced, the scratches have been a major defects on polished surfaces which cause the electrical shorts between vias or metal lines [1,2]. It was reported that micro-scratches are caused by large, irregularly shaped particles during CMP process. Therefore, most of the CMP users have used < 5 m POU filter to remove and reduce the scratch source from the slurry. However, the scratch has always been the biggest concern in ILD polishing whatever preventive actions are taken. Silica and ceria slurries are widely used for ILD CMP process. There are not much differences in generated scratches and their formation mechanism. In this study, the scratches were investigated as a function of polishing conditions with possible explanation on formation mechanism in ILD CMP.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.258-258
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• 2008

Among several available high-k dielectrics the lanthanum zirconium oxide ($LaZrO_x$) system is very attractive as a buffer insulating layer. Because both lanthanum and zirconium atoms, the constituents of the $LaZrO_x$ thin film, have been considered to be thermally stable in contact with Si. The $LaZrO_x$ films were deposited by a sol-gel method. After the deposition, The $LaZrO_x$ films were crystallized at $750^{\circ}C$ for 30 minutes in $O_2$ ambient. PVDF-TrFE films were deposited on these $LaZrO_x$/Si structures using a sol-gel technique. The sol-gel solution was spin-coated on $LaZrO_x$/Si structures at 500 rpm for 5 sec and 2500 rpm for 15 sec. The deposited layer was dried at $165^{\circ}C$ for 30 min in air on a hot-plate. Then, we deposited Au electrode on PVDF-TrFE films using thermal evaporation.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.11
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• pp.1998-2003
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• 2007

A flexible but implantable polyimide-based neural implant was fabricated for reliable and stable long-term monitoring of neural activities from brain. The developed neural implant provides 3-dimensional (3D) $3{\times}3$ structure, avoids any hand handling, and makes the insertion more efficient and reliable. Any film curvature caused by residual stress was not observed in the electrode. The 3D flexible polyimide electrode penetrated a dense gel whose stiffness is close to live brain tissue, because a ${\sim}1{\mu}m$ thick nickel was electroplated along the edge of the shank in order to improve the stiffness. The recording sites were positioned at both side of the shank to increase the probability of recording neural signals from a target volume of tissue. Impedance remained stable over 72 hours because of extremely low moisture uptake in the polyimide dielectric layers. At electrical recording test in vitro, the fabricated electrode showed excellent recording performance, suggesting that this electrode has the potential for great recording from neuron firing and long-term implant performance.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.389-392
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• 2009

Metal oxides have been proposed as an alternative channel material to hydrogenated amorphous silicon in thin film transistors (TFTs) because their higher mobility and stability make them suitable for transistor active layers. Thin films of indium zinc oxide (IZO) were deposited using a High Target Utilization Sputtering (HiTUS) system on various dielectrics, some of which were also deposited with the HiTUS. Investigations into bottom-gated IZO TFTs have found mobilities of 8 $cm^2V\;^1s^{-1}$ and switching ratios of $10^6$. There is a variation in the threshold voltage dependent on both oxygen concentration, and dielectric choice. Silica, alumina and silicon nitride produced stable TFTs, whilst hafnia was found to break down as a result of the IZO.

• 전기의세계
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• v.25 no.1
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• pp.95-100
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• 1976

The main purpose of this paper is to study on the transient current due to the change of environmental temperature under no external field in the arrangement of M$_{1}$(metal)-P(polyver)-M$_{2}$(metal). The specimer of polymeric insulator sandwiched by two metal electrodes composes a parallel-plate condenser represented by Maxwell-model. The behaviors of short circuit current flowing in M-P-M arrangement are very complex and the analysis of its conduction mechanism appears to be much complicated. In this paper we can suggest that a contact potential difference as an energetic state exists in the thin film specimen both sides of which are contacted by two different metals having different cook functions. Futhermore the contact potential difference appears to be constant through the course of temperature change, however, the dielectric constant and caparitance of the specimen must be temperature dependent. Accordingly the charge difference induced on both sides of electrodes may be a cause for the shory circuited transient current flowing through the external circuit. It is also suggestive that the results of the observation must be considered in cases of insulation design of electrical machines and D.C. cable for high voltage use.